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| author | Jeff Law <law@gcc.gnu.org> | 1996-02-06 13:14:33 -0700 |
|---|---|---|
| committer | Jeff Law <law@gcc.gnu.org> | 1996-02-06 13:14:33 -0700 |
| commit | cda0f51eb5754177e9890d15c46be51d5ab0c645 (patch) | |
| tree | f7d993143a97427478e8dec0b021353deb3cdddb /gcc | |
| parent | 77c7aaec021996c6384cca59c5c21daf14b0e09a (diff) | |
| download | gcc-cda0f51eb5754177e9890d15c46be51d5ab0c645.zip gcc-cda0f51eb5754177e9890d15c46be51d5ab0c645.tar.gz gcc-cda0f51eb5754177e9890d15c46be51d5ab0c645.tar.bz2 | |
pa.md (various patterns): Avoid using "general operand" in define_insn patterns.
* pa.md (various patterns): Avoid using "general operand" in
define_insn patterns.
From-SVN: r11176
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/config/pa/pa.md | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/gcc/config/pa/pa.md b/gcc/config/pa/pa.md index abaaa36..2df8726 100644 --- a/gcc/config/pa/pa.md +++ b/gcc/config/pa/pa.md @@ -2090,7 +2090,7 @@ ;; This must come before the movdf pattern, and it must be present ;; to handle obscure reloading cases. (define_insn "" - [(set (match_operand:DF 0 "general_operand" "=?r,f") + [(set (match_operand:DF 0 "register_operand" "=?r,f") (match_operand:DF 1 "" "?F,m"))] "GET_CODE (operands[1]) == CONST_DOUBLE && operands[1] != CONST0_RTX (DFmode) @@ -2433,7 +2433,7 @@ ;; This must come before the movsf pattern, and it must be present ;; to handle obscure reloading cases. (define_insn "" - [(set (match_operand:SF 0 "general_operand" "=?r,f") + [(set (match_operand:SF 0 "register_operand" "=?r,f") (match_operand:SF 1 "" "?F,m"))] "GET_CODE (operands[1]) == CONST_DOUBLE && operands[1] != CONST0_RTX (SFmode) @@ -2729,7 +2729,7 @@ ;; to be reloaded by putting the constant into memory. ;; It must come before the more general floatsisf2 pattern. (define_insn "" - [(set (match_operand:SF 0 "general_operand" "=f") + [(set (match_operand:SF 0 "register_operand" "=f") (float:SF (match_operand:SI 1 "const_int_operand" "m")))] "! TARGET_SOFT_FLOAT" "fldws %1,%0\;fcnvxf,sgl,sgl %0,%0" @@ -2737,7 +2737,7 @@ (set_attr "length" "8")]) (define_insn "floatsisf2" - [(set (match_operand:SF 0 "general_operand" "=f") + [(set (match_operand:SF 0 "register_operand" "=f") (float:SF (match_operand:SI 1 "register_operand" "f")))] "! TARGET_SOFT_FLOAT" "fcnvxf,sgl,sgl %1,%0" @@ -2748,7 +2748,7 @@ ;; to be reloaded by putting the constant into memory. ;; It must come before the more general floatsidf2 pattern. (define_insn "" - [(set (match_operand:DF 0 "general_operand" "=f") + [(set (match_operand:DF 0 "register_operand" "=f") (float:DF (match_operand:SI 1 "const_int_operand" "m")))] "! TARGET_SOFT_FLOAT" "fldws %1,%0\;fcnvxf,sgl,dbl %0,%0" @@ -2756,7 +2756,7 @@ (set_attr "length" "8")]) (define_insn "floatsidf2" - [(set (match_operand:DF 0 "general_operand" "=f") + [(set (match_operand:DF 0 "register_operand" "=f") (float:DF (match_operand:SI 1 "register_operand" "f")))] "! TARGET_SOFT_FLOAT" "fcnvxf,sgl,dbl %1,%0" @@ -2784,7 +2784,7 @@ "operands[2] = gen_reg_rtx (DImode);") (define_insn "floatdisf2" - [(set (match_operand:SF 0 "general_operand" "=f") + [(set (match_operand:SF 0 "register_operand" "=f") (float:SF (match_operand:DI 1 "register_operand" "f")))] "TARGET_SNAKE && ! TARGET_SOFT_FLOAT" "fcnvxf,dbl,sgl %1,%0" @@ -2792,7 +2792,7 @@ (set_attr "length" "4")]) (define_insn "floatdidf2" - [(set (match_operand:DF 0 "general_operand" "=f") + [(set (match_operand:DF 0 "register_operand" "=f") (float:DF (match_operand:DI 1 "register_operand" "f")))] "TARGET_SNAKE && ! TARGET_SOFT_FLOAT" "fcnvxf,dbl,dbl %1,%0" |