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| author | Jan Hubicka <jh@suse.cz> | 2001-02-14 01:15:15 +0100 |
|---|---|---|
| committer | Jan Hubicka <hubicka@gcc.gnu.org> | 2001-02-14 00:15:15 +0000 |
| commit | ca9a9b12e9a59cf5b0652d4987a93239a14ab28d (patch) | |
| tree | 9345c1a1cb4118ee1263aea3796392c8a52d5987 /gcc | |
| parent | 94807d3318a6a63a3a0efe3419e6a402e77087bb (diff) | |
| download | gcc-ca9a9b12e9a59cf5b0652d4987a93239a14ab28d.zip gcc-ca9a9b12e9a59cf5b0652d4987a93239a14ab28d.tar.gz gcc-ca9a9b12e9a59cf5b0652d4987a93239a14ab28d.tar.bz2 | |
i386.md (fixsfsi2, fixdfdi2): Fix previous patch again.
* i386.md (fixsfsi2, fixdfdi2): Fix previous patch again.
(sqrtsf2): Use TARGET_SSE instead of TARGET_SSE2)
(sqrtsf2 patterns): Use 'x' instead of 'Y'.
(sqrtextendsfdf2): Disable for SSE2.
From-SVN: r39652
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 14 | ||||
| -rw-r--r-- | gcc/config/i386/i386.md | 18 |
2 files changed, 23 insertions, 9 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 1068c75..006f4d2 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,17 @@ +Wed Feb 14 01:13:59 CET 2001 Jan Hubicka <jh@suse.cz> + + * i386.md (fixsfsi2, fixdfdi2): Fix previous patch again. + (sqrtsf2): Use TARGET_SSE instead of TARGET_SSE2) + (sqrtsf2 patterns): Use 'x' instead of 'Y'. + (sqrtextendsfdf2): Disable for SSE2. + +Wed Feb 14 00:19:28 CET 2001 Jan Hubicka <jh@suse.cz> + + * i386.md (fixsfsi2, fixdfdi2): Fix previous patch again. + (sqrtsf2): Use TARGET_SSE instead of TARGET_SSE2) + (sqrtsf2 patterns): Use 'x' instead of 'Y'. + (sqrtextendsfdf2): Disable for SSE2. + Wed Feb 14 00:11:20 CET 2001 Jan Hubicka <jh@suse.cz> * i386.md (movsfcc_1): Support integer cmove instruction. diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index 8ebed23..acd709c 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -4097,7 +4097,7 @@ { if (TARGET_SSE2) { - rtx out = force_reg (SImode, operands[0]); + rtx out = REG_P (operands[0]) ? operands[0] : gen_reg_rtx (SImode); emit_insn (gen_fix_truncdfsi_sse (out, operands[1])); if (out != operands[0]) emit_move_insn (operands[0], out); @@ -4121,7 +4121,7 @@ { if (TARGET_SSE2) { - rtx out = force_reg (SImode, operands[0]); + rtx out = REG_P (operands[0]) ? operands[0] : gen_reg_rtx (SImode); emit_insn (gen_fix_truncdfsi_sse (out, operands[1])); if (out != operands[0]) emit_move_insn (operands[0], out); @@ -10860,7 +10860,7 @@ operands[4] = ix86_force_to_memory (GET_MODE (operands[2]), operands[2]); operands[4] = gen_rtx_FLOAT (GET_MODE (operands[0]), operands[4]); emit_insn (gen_rtx_SET (VOIDmode, operands[0], - gen_rtx_fmt_ee (GET_CODE (operands[3]), + gen_rtx_fmt_ee (GET_CODE (operands[5]), GET_MODE (operands[3]), operands[1], operands[4]))); @@ -10873,7 +10873,7 @@ (define_expand "sqrtsf2" [(set (match_operand:SF 0 "register_operand" "") (sqrt:SF (match_operand:SF 1 "nonimmediate_operand" "")))] - "(! TARGET_NO_FANCY_MATH_387 && TARGET_80387) || TARGET_SSE2" + "(! TARGET_NO_FANCY_MATH_387 && TARGET_80387) || TARGET_SSE" " { if (!TARGET_SSE) @@ -10881,8 +10881,8 @@ }") (define_insn "sqrtsf2_1" - [(set (match_operand:SF 0 "register_operand" "=f#Y,Y#f") - (sqrt:SF (match_operand:SF 1 "nonimmediate_operand" "0#Y,Ym#f")))] + [(set (match_operand:SF 0 "register_operand" "=f#x,x#f") + (sqrt:SF (match_operand:SF 1 "nonimmediate_operand" "0#x,xm#f")))] "! TARGET_NO_FANCY_MATH_387 && TARGET_80387 && (TARGET_SSE && TARGET_MIX_SSE_I387)" "@ @@ -10893,8 +10893,8 @@ (set_attr "athlon_decode" "direct,*")]) (define_insn "sqrtsf2_1_sse_only" - [(set (match_operand:SF 0 "register_operand" "=Y") - (sqrt:SF (match_operand:SF 1 "nonimmediate_operand" "Ym")))] + [(set (match_operand:SF 0 "register_operand" "=x") + (sqrt:SF (match_operand:SF 1 "nonimmediate_operand" "xm")))] "TARGET_SSE && (!TARGET_80387 || !TARGET_MIX_SSE_I387)" "sqrtss\\t{%1, %0|%0, %1}" [(set_attr "type" "sse") @@ -10956,7 +10956,7 @@ [(set (match_operand:DF 0 "register_operand" "=f") (sqrt:DF (float_extend:DF (match_operand:SF 1 "register_operand" "0"))))] - "! TARGET_NO_FANCY_MATH_387 && TARGET_80387" + "! TARGET_NO_FANCY_MATH_387 && TARGET_80387 && !TARGET_SSE2" "fsqrt" [(set_attr "type" "fpspc") (set_attr "mode" "DF") |