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| author | Joern Rennecke <joern.rennecke@riscy-ip.com> | 2018-12-20 23:00:00 +0000 |
|---|---|---|
| committer | Joern Rennecke <amylaar@gcc.gnu.org> | 2018-12-20 23:00:00 +0000 |
| commit | c9aa91088d2ab49a29c5588f62657afd7a84139e (patch) | |
| tree | ddba17356d49092121f0d9478c63e3e3263eb63e /gcc | |
| parent | da77eace90fd99b38cd89ce281033d86ebfda434 (diff) | |
| download | gcc-c9aa91088d2ab49a29c5588f62657afd7a84139e.zip gcc-c9aa91088d2ab49a29c5588f62657afd7a84139e.tar.gz gcc-c9aa91088d2ab49a29c5588f62657afd7a84139e.tar.bz2 | |
tree-vect-data-refs.c (vect_enhance_data_refs_alignment): Don't do versioning for data accesses with misaligned step.
2018-12-20 Joern Rennecke <joern.rennecke@riscy-ip.com>
* tree-vect-data-refs.c (vect_enhance_data_refs_alignment): Don't do
versioning for data accesses with misaligned step.
From-SVN: r267314
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/tree-vect-data-refs.c | 14 |
2 files changed, 19 insertions, 0 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index acadee9..2c12ca2 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2018-12-20 Joern Rennecke <joern.rennecke@riscy-ip.com> + + * tree-vect-data-refs.c (vect_enhance_data_refs_alignment): Don't do + versioning for data accesses with misaligned step. + 2018-12-20 H.J. Lu <hongjiu.lu@intel.com> PR c/51628 diff --git a/gcc/tree-vect-data-refs.c b/gcc/tree-vect-data-refs.c index deb7121..6cd2c30 100644 --- a/gcc/tree-vect-data-refs.c +++ b/gcc/tree-vect-data-refs.c @@ -2160,6 +2160,20 @@ vect_enhance_data_refs_alignment (loop_vec_info loop_vinfo) break; } + /* Forcing alignment in the first iteration is no good if + we don't keep it across iterations. For now, just disable + versioning in this case. + ?? We could actually unroll the loop to archive the required + overall step alignemnt, and forcing the alignment could be + done by doing some iterations of the non-vectorized loop. */ + if (!multiple_p (LOOP_VINFO_VECT_FACTOR (loop_vinfo) + * DR_STEP_ALIGNMENT (dr), + DR_TARGET_ALIGNMENT (dr))) + { + do_versioning = false; + break; + } + /* The rightmost bits of an aligned address must be zeros. Construct the mask needed for this test. For example, GET_MODE_SIZE for the vector mode V4SI is 16 bytes so the |