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authorKyrylo Tkachov <kyrylo.tkachov@arm.com>2015-10-20 16:13:29 +0000
committerKyrylo Tkachov <ktkachov@gcc.gnu.org>2015-10-20 16:13:29 +0000
commitbfb792b6044c340b54a9d04b2a1e6e0e608b3aa6 (patch)
treeb5572c8e3a2bfd8f404725ebcf71e737b5673826 /gcc
parent39252973769c869814f7dcbf1b62cf7a90ac1417 (diff)
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[simplify-rtx][2/2] Use constants from pool when simplifying binops
* simplify-rtx.c (simplify_binary_operation): If either operand was a constant pool reference use them if all other simplifications failed. * gcc.target/aarch64/fmul_fcvt_1.c: Add multiply-by-32 cases. From-SVN: r229086
Diffstat (limited to 'gcc')
-rw-r--r--gcc/ChangeLog5
-rw-r--r--gcc/simplify-rtx.c12
-rw-r--r--gcc/testsuite/ChangeLog4
-rw-r--r--gcc/testsuite/gcc.target/aarch64/fmul_fcvt_1.c12
4 files changed, 32 insertions, 1 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 862b68b..e339817 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,5 +1,10 @@
2015-10-20 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+ * simplify-rtx.c (simplify_binary_operation): If either operand was
+ a constant pool reference use them if all other simplifications failed.
+
+2015-10-20 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
* config/aarch64/aarch64.md
(*aarch64_fcvt<su_optab><GPF:mode><GPI:mode>2_mult): New pattern.
* config/aarch64/aarch64-simd.md
diff --git a/gcc/simplify-rtx.c b/gcc/simplify-rtx.c
index 1f91afc..eb3f153 100644
--- a/gcc/simplify-rtx.c
+++ b/gcc/simplify-rtx.c
@@ -2001,7 +2001,17 @@ simplify_binary_operation (enum rtx_code code, machine_mode mode,
tem = simplify_const_binary_operation (code, mode, trueop0, trueop1);
if (tem)
return tem;
- return simplify_binary_operation_1 (code, mode, op0, op1, trueop0, trueop1);
+ tem = simplify_binary_operation_1 (code, mode, op0, op1, trueop0, trueop1);
+
+ if (tem)
+ return tem;
+
+ /* If the above steps did not result in a simplification and op0 or op1
+ were constant pool references, use the referenced constants directly. */
+ if (trueop0 != op0 || trueop1 != op1)
+ return simplify_gen_binary (code, mode, trueop0, trueop1);
+
+ return NULL_RTX;
}
/* Subroutine of simplify_binary_operation. Simplify a binary operation
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index d32bf0c..2b6118f 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,5 +1,9 @@
2015-10-20 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+ * gcc.target/aarch64/fmul_fcvt_1.c: Add multiply-by-32 cases.
+
+2015-10-20 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
* gcc.target/aarch64/fmul_fcvt_1.c: New test.
* gcc.target/aarch64/fmul_fcvt_2.c: Likewise.
diff --git a/gcc/testsuite/gcc.target/aarch64/fmul_fcvt_1.c b/gcc/testsuite/gcc.target/aarch64/fmul_fcvt_1.c
index 4e3ace7..05e06e3 100644
--- a/gcc/testsuite/gcc.target/aarch64/fmul_fcvt_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/fmul_fcvt_1.c
@@ -83,6 +83,16 @@ FUNC_DEFD (16)
/* { dg-final { scan-assembler-times "fcvtzu\tx\[0-9\], d\[0-9\]*.*#4" 1 } } */
/* { dg-final { scan-assembler-times "fcvtzu\tw\[0-9\], d\[0-9\]*.*#4" 1 } } */
+FUNC_DEFS (32)
+FUNC_DEFD (32)
+/* { dg-final { scan-assembler-times "fcvtzs\tw\[0-9\], s\[0-9\]*.*#5" 1 } } */
+/* { dg-final { scan-assembler-times "fcvtzs\tx\[0-9\], s\[0-9\]*.*#5" 1 } } */
+/* { dg-final { scan-assembler-times "fcvtzs\tx\[0-9\], d\[0-9\]*.*#5" 1 } } */
+/* { dg-final { scan-assembler-times "fcvtzs\tw\[0-9\], d\[0-9\]*.*#5" 1 } } */
+/* { dg-final { scan-assembler-times "fcvtzu\tw\[0-9\], s\[0-9\]*.*#5" 1 } } */
+/* { dg-final { scan-assembler-times "fcvtzu\tx\[0-9\], s\[0-9\]*.*#5" 1 } } */
+/* { dg-final { scan-assembler-times "fcvtzu\tx\[0-9\], d\[0-9\]*.*#5" 1 } } */
+/* { dg-final { scan-assembler-times "fcvtzu\tw\[0-9\], d\[0-9\]*.*#5" 1 } } */
#define FUNC_TESTS(__a, __b) \
do \
@@ -120,10 +130,12 @@ main (void)
FUNC_TESTS (4, i);
FUNC_TESTS (8, i);
FUNC_TESTS (16, i);
+ FUNC_TESTS (32, i);
FUNC_TESTD (4, i);
FUNC_TESTD (8, i);
FUNC_TESTD (16, i);
+ FUNC_TESTD (32, i);
}
return 0;
}