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author | Kazu Hirata <kazu@cs.umass.edu> | 2003-02-19 17:47:18 +0000 |
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committer | Kazu Hirata <kazu@gcc.gnu.org> | 2003-02-19 17:47:18 +0000 |
commit | be9d08c2efc6908e863d7c943e8807169a8367a0 (patch) | |
tree | 6ed12bf5277d4308a9f60a15423843f21ab9351a /gcc | |
parent | cd48dadc126dab60f60e5998c33242b5fa9a28ee (diff) | |
download | gcc-be9d08c2efc6908e863d7c943e8807169a8367a0.zip gcc-be9d08c2efc6908e863d7c943e8807169a8367a0.tar.gz gcc-be9d08c2efc6908e863d7c943e8807169a8367a0.tar.bz2 |
h8300.md (*iorsi3_two_qi_sext): New.
* config/h8300/h8300.md (*iorsi3_two_qi_sext): New.
(*ashiftsi_sextqi_7): Likewise.
From-SVN: r63125
Diffstat (limited to 'gcc')
-rw-r--r-- | gcc/ChangeLog | 5 | ||||
-rw-r--r-- | gcc/config/h8300/h8300.md | 38 |
2 files changed, 43 insertions, 0 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 0adec4f..9316667 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2003-02-19 Kazu Hirata <kazu@cs.umass.edu> + + * config/h8300/h8300.md (*iorsi3_two_qi_sext): New. + (*ashiftsi_sextqi_7): Likewise. + 2003-02-19 Rainer Orth <ro@TechFak.Uni-Bielefeld.DE> * config/mips/iris6.h (TARGET_OS_CPP_BUILTINS): Define __c99 for diff --git a/gcc/config/h8300/h8300.md b/gcc/config/h8300/h8300.md index 2332c4b..1ab5f32 100644 --- a/gcc/config/h8300/h8300.md +++ b/gcc/config/h8300/h8300.md @@ -2804,6 +2804,23 @@ [(set_attr "cc" "clobber") (set_attr "length" "2")]) +(define_insn_and_split "*iorsi3_two_qi_sext" + [(set (match_operand:SI 0 "register_operand" "=r") + (ior:SI (zero_extend:SI (match_operand:QI 1 "register_operand" "0")) + (ashift:SI (sign_extend:SI (match_operand:QI 2 "register_operand" "r")) + (const_int 8))))] + "(TARGET_H8300H || TARGET_H8300S)" + "#" + "&& reload_completed" + [(set (match_dup 3) + (ior:HI (zero_extend:HI (match_dup 1)) + (ashift:HI (match_dup 4) + (const_int 8)))) + (set (match_dup 0) + (sign_extend:SI (match_dup 3)))] + "operands[3] = gen_rtx_REG (HImode, REGNO (operands[0])); + operands[4] = gen_rtx_REG (HImode, REGNO (operands[2]));") + (define_insn "*iorsi3_ashift_31" [(set (match_operand:SI 0 "register_operand" "=&r") (ior:SI (ashift:SI (match_operand:SI 1 "register_operand" "r") @@ -2995,6 +3012,27 @@ [(set_attr "cc" "clobber") (set_attr "length" "2")]) +;; ashift:SI + +(define_insn_and_split "*ashiftsi_sextqi_7" + [(set (match_operand:SI 0 "register_operand" "=r") + (ashift:SI (sign_extend:SI (match_operand:QI 1 "register_operand" "0")) + (const_int 7)))] + "(TARGET_H8300H || TARGET_H8300S)" + "#" + "&& reload_completed" + [(parallel [(set (match_dup 2) + (ashift:HI (match_dup 2) + (const_int 8))) + (clobber (scratch:QI))]) + (set (match_dup 0) + (sign_extend:SI (match_dup 2))) + (parallel [(set (match_dup 0) + (ashiftrt:SI (match_dup 0) + (const_int 1))) + (clobber (scratch:QI))])] + "operands[2] = gen_rtx_REG (HImode, REGNO (operands[0]));") + ;; Storing a part of HImode to QImode. (define_insn "" |