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| author | David Edelsohn <dje.gcc@gmail.com> | 2018-11-28 18:10:21 +0000 |
|---|---|---|
| committer | David Edelsohn <dje@gcc.gnu.org> | 2018-11-28 13:10:21 -0500 |
| commit | bd2010acc2e226b7f7274797e5f837494991efa4 (patch) | |
| tree | 52e8e71f4a85e10c9c13dcc6322741b073642e83 /gcc | |
| parent | 5456f30d92062d234208cd8634e54787f6e2664f (diff) | |
| download | gcc-bd2010acc2e226b7f7274797e5f837494991efa4.zip gcc-bd2010acc2e226b7f7274797e5f837494991efa4.tar.gz gcc-bd2010acc2e226b7f7274797e5f837494991efa4.tar.bz2 | |
* config/rs6000/aix72.h: Update to match aix71.h changes.
From-SVN: r266574
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 4 | ||||
| -rw-r--r-- | gcc/config/rs6000/aix72.h | 52 |
2 files changed, 29 insertions, 27 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 6456fac..dcfad06 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,7 @@ +2018-11-28 David Edelsohn <dje.gcc@gmail.com> + + * config/rs6000/aix72.h: Update to match aix71.h changes. + 2018-11-28 Jeff Law <law@redhat.com> * config/h8300/constraints.md: Add "C" constraint for call insns. diff --git a/gcc/config/rs6000/aix72.h b/gcc/config/rs6000/aix72.h index a4c4e6d..cfb0258 100644 --- a/gcc/config/rs6000/aix72.h +++ b/gcc/config/rs6000/aix72.h @@ -1,6 +1,6 @@ /* Definitions of target machine for GNU compiler, for IBM RS/6000 POWER running AIX V7.2. - Copyright (C) 2002-2017 Free Software Foundation, Inc. + Copyright (C) 2002-2018 Free Software Foundation, Inc. Contributed by David Edelsohn (edelsohn@gnu.org). This file is part of GCC. @@ -59,7 +59,7 @@ do { \ } while (0) #undef ASM_SPEC -#define ASM_SPEC "-u %{maix64:-a64 %{!mcpu*:-mppc64}} %(asm_cpu)" +#define ASM_SPEC "-u %{maix64:-a64} %(asm_cpu)" /* Common ASM definitions used by ASM_SPEC amongst the various targets for handling -mcpu=xxx switches. There is a parallel list in driver-rs6000.c to @@ -67,31 +67,29 @@ do { \ you make changes here, make them there also. */ #undef ASM_CPU_SPEC #define ASM_CPU_SPEC \ -"%{!mcpu*: %{!maix64: \ - %{mpowerpc64: -mppc64} \ - %{maltivec: -m970} \ - %{!maltivec: %{!mpowerpc64: %(asm_default)}}}} \ -%{mcpu=native: %(asm_cpu_native)} \ -%{mcpu=power3: -m620} \ -%{mcpu=power4: -mpwr4} \ -%{mcpu=power5: -mpwr5} \ -%{mcpu=power5+: -mpwr5x} \ -%{mcpu=power6: -mpwr6} \ -%{mcpu=power6x: -mpwr6} \ -%{mcpu=power7: -mpwr7} \ -%{mcpu=power8: -mpwr8} \ -%{mcpu=power9: -mpwr9} \ -%{mcpu=powerpc: -mppc} \ -%{mcpu=rs64a: -mppc} \ -%{mcpu=603: -m603} \ -%{mcpu=603e: -m603} \ -%{mcpu=604: -m604} \ -%{mcpu=604e: -m604} \ -%{mcpu=620: -m620} \ -%{mcpu=630: -m620} \ -%{mcpu=970: -m970} \ -%{mcpu=G5: -m970} \ -%{mvsx: %{!mcpu*: -mpwr7}} \ +"%{mcpu=native: %(asm_cpu_native); \ + mcpu=power9: -mpwr9; \ + mcpu=power8: -mpwr8; \ + mcpu=power7: -mpwr7; \ + mcpu=power6x|mcpu=power6: -mpwr6; \ + mcpu=power5+: -mpwr5x; \ + mcpu=power5: -mpwr5; \ + mcpu=power4: -mpwr4; \ + mcpu=power3: -m620; \ + mcpu=powerpc: -mppc; \ + mcpu=rs64a: -mppc; \ + mcpu=603: -m603; \ + mcpu=603e: -m603; \ + mcpu=604: -m604; \ + mcpu=604e: -m604; \ + mcpu=620: -m620; \ + mcpu=630: -m620; \ + mcpu=970|mcpu=G5: -m970; \ + !mcpu*: %{mvsx: -mpwr6; \ + maltivec: -m970; \ + maix64|mpowerpc64: -mppc64; \ + : %(asm_default)}; \ + :%eMissing -mcpu option in ASM_SPEC_CPU?\n} \ -many" #undef ASM_DEFAULT_SPEC |