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authorJohn David Anglin <danglin@gcc.gnu.org>2018-09-20 01:04:34 +0000
committerJohn David Anglin <danglin@gcc.gnu.org>2018-09-20 01:04:34 +0000
commitbad4408cadddb199556e7da9fb4b267a4eb42805 (patch)
tree7536be4425b98e43853dc88d25d2136a262e0e65 /gcc
parentfa8332f13f2e0c97ecaa7e6f86a7e866ae2e73fc (diff)
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pa.md (atomic_storeqi): Restore deleted expander.
* config/pa/pa.md (atomic_storeqi): Restore deleted expander. (atomic_storehi): Likewise. (atomic_storesi): Likewise. (atomic_loaddi): Restore compare and swap exchange loop code. From-SVN: r264433
Diffstat (limited to 'gcc')
-rw-r--r--gcc/ChangeLog7
-rw-r--r--gcc/config/pa/pa.md62
2 files changed, 68 insertions, 1 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index cfd8749..30e784e 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,10 @@
+2018-09-19 John David Anglin <danglin@gcc.gnu.org>
+
+ * config/pa/pa.md (atomic_storeqi): Restore deleted expander.
+ (atomic_storehi): Likewise.
+ (atomic_storesi): Likewise.
+ (atomic_loaddi): Restore compare and swap exchange loop code.
+
2018-09-19 Segher Boessenkool <segher@kernel.crashing.org>
PR rtl-optimization/86902
diff --git a/gcc/config/pa/pa.md b/gcc/config/pa/pa.md
index 0094c58..7761150 100644
--- a/gcc/config/pa/pa.md
+++ b/gcc/config/pa/pa.md
@@ -9958,7 +9958,59 @@ add,l %2,%3,%3\;bv,n %%r0(%3)"
;; These patterns are at the bottom so the non atomic versions are preferred.
-;; Implement atomic DImode load using 64-bit floating point load.
+(define_expand "atomic_storeqi"
+ [(match_operand:QI 0 "memory_operand") ;; memory
+ (match_operand:QI 1 "register_operand") ;; val out
+ (match_operand:SI 2 "const_int_operand")] ;; model
+ ""
+{
+ if (TARGET_SYNC_LIBCALL)
+ {
+ rtx mem = operands[0];
+ rtx val = operands[1];
+ if (pa_maybe_emit_compare_and_swap_exchange_loop (NULL_RTX, mem, val))
+ DONE;
+ }
+ FAIL;
+})
+
+;; Implement atomic HImode stores using exchange.
+
+(define_expand "atomic_storehi"
+ [(match_operand:HI 0 "memory_operand") ;; memory
+ (match_operand:HI 1 "register_operand") ;; val out
+ (match_operand:SI 2 "const_int_operand")] ;; model
+ ""
+{
+ if (TARGET_SYNC_LIBCALL)
+ {
+ rtx mem = operands[0];
+ rtx val = operands[1];
+ if (pa_maybe_emit_compare_and_swap_exchange_loop (NULL_RTX, mem, val))
+ DONE;
+ }
+ FAIL;
+})
+
+;; Implement atomic SImode store using exchange.
+
+(define_expand "atomic_storesi"
+ [(match_operand:SI 0 "memory_operand") ;; memory
+ (match_operand:SI 1 "register_operand") ;; val out
+ (match_operand:SI 2 "const_int_operand")] ;; model
+ ""
+{
+ if (TARGET_SYNC_LIBCALL)
+ {
+ rtx mem = operands[0];
+ rtx val = operands[1];
+ if (pa_maybe_emit_compare_and_swap_exchange_loop (NULL_RTX, mem, val))
+ DONE;
+ }
+ FAIL;
+})
+
+;; Implement atomic DImode load.
(define_expand "atomic_loaddi"
[(match_operand:DI 0 "register_operand") ;; val out
@@ -9999,6 +10051,14 @@ add,l %2,%3,%3\;bv,n %%r0(%3)"
{
enum memmodel model;
+ if (TARGET_SYNC_LIBCALL)
+ {
+ rtx mem = operands[0];
+ rtx val = operands[1];
+ if (pa_maybe_emit_compare_and_swap_exchange_loop (NULL_RTX, mem, val))
+ DONE;
+ }
+
if (TARGET_64BIT || TARGET_DISABLE_FPREGS || TARGET_SOFT_FLOAT)
FAIL;