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authorRichard Earnshaw <rearnsha@arm.com>2002-09-30 11:18:38 +0000
committerRichard Earnshaw <rearnsha@gcc.gnu.org>2002-09-30 11:18:38 +0000
commitb93a0fe6baa4f264b89d45434962c0bd52cfaa4b (patch)
treebcfa19589dc612d4fbc0be7571afdb13f0ca916e /gcc
parent067bb3a79d1fa9541d72fc0898ee4a962c040f82 (diff)
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arm.h (BASE_REG_CLASS): Always return LO_REGS for Thumb.
* arm.h (BASE_REG_CLASS): Always return LO_REGS for Thumb. (MODE_BASE_REG_CLASS, case Thumb): Only return BASE_REGS if we know that we have a SImode access, and only then if reload hasn't completed; for all other cases, use LO_REGS. From-SVN: r57644
Diffstat (limited to 'gcc')
-rw-r--r--gcc/ChangeLog7
-rw-r--r--gcc/config/arm/arm.h14
2 files changed, 15 insertions, 6 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 6bd1e0e..15dfb25 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,10 @@
+2002-09-30 Richard Earnshaw <rearnsha@arm.com>
+
+ * arm.h (BASE_REG_CLASS): Always return LO_REGS for Thumb.
+ (MODE_BASE_REG_CLASS, case Thumb): Only return BASE_REGS if we know
+ that we have a SImode access, and only then if reload hasn't completed;
+ for all other cases, use LO_REGS.
+
2002-09-29 Richard Henderson <rth@redhat.com>
* real.c (real_from_string): Apply sign last. Tidy exponent handling.
diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h
index 9c0ce44..3b3e38a 100644
--- a/gcc/config/arm/arm.h
+++ b/gcc/config/arm/arm.h
@@ -1070,14 +1070,16 @@ enum reg_class
/* The class value for index registers, and the one for base regs. */
#define INDEX_REG_CLASS (TARGET_THUMB ? LO_REGS : GENERAL_REGS)
-#define BASE_REG_CLASS (TARGET_THUMB ? BASE_REGS : GENERAL_REGS)
+#define BASE_REG_CLASS (TARGET_THUMB ? LO_REGS : GENERAL_REGS)
-/* For the Thumb the high registers cannot be used as base
- registers when addressing quanitities in QI or HI mode. */
+/* For the Thumb the high registers cannot be used as base registers
+ when addressing quanitities in QI or HI mode; if we don't know the
+ mode, then we must be conservative. After reload we must also be
+ conservative, since we can't support SP+reg addressing, and we
+ can't fix up any bad substitutions. */
#define MODE_BASE_REG_CLASS(MODE) \
- (TARGET_ARM ? BASE_REGS : \
- (((MODE) == QImode || (MODE) == HImode || (MODE) == VOIDmode) \
- ? LO_REGS : BASE_REGS))
+ (TARGET_ARM ? GENERAL_REGS : \
+ (((MODE) == SImode && !reload_completed) ? BASE_REGS : LO_REGS))
/* When SMALL_REGISTER_CLASSES is nonzero, the compiler allows
registers explicitly used in the rtl to be used as spill registers