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author | Richard Henderson <rth@redhat.com> | 2005-01-19 22:35:37 -0800 |
---|---|---|
committer | Richard Henderson <rth@gcc.gnu.org> | 2005-01-19 22:35:37 -0800 |
commit | b100079f2f901d64b6a0f3f996ba3a6d96e508c6 (patch) | |
tree | 7bdf73468288831d4be85f913fdadd4300139dab /gcc | |
parent | 539eaa3aaaf75211773d0861322b0e3bde6f7df9 (diff) | |
download | gcc-b100079f2f901d64b6a0f3f996ba3a6d96e508c6.zip gcc-b100079f2f901d64b6a0f3f996ba3a6d96e508c6.tar.gz gcc-b100079f2f901d64b6a0f3f996ba3a6d96e508c6.tar.bz2 |
re PR target/19427 (gcc.c-torture/execute/simd-1.c compilation fails for i686 with -msse)
PR target/19427
* config/i386/i386.c (ix86_expand_vector_set): Fix third and fourth
shufps elements.
(ix86_expand_vector_extract): Likewise.
From-SVN: r93946
Diffstat (limited to 'gcc')
-rw-r--r-- | gcc/ChangeLog | 7 | ||||
-rw-r--r-- | gcc/config/i386/i386.c | 8 |
2 files changed, 11 insertions, 4 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index e3d1f0d..ca86ebb 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,5 +1,12 @@ 2005-01-19 Richard Henderson <rth@redhat.com> + PR target/19427 + * config/i386/i386.c (ix86_expand_vector_set): Fix third and fourth + shufps elements. + (ix86_expand_vector_extract): Likewise. + +2005-01-19 Richard Henderson <rth@redhat.com> + PR middle-end/19304 * expr.c (emit_move_change_mode): New argument force; use simplify_gen_subreg if true. diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index cc3cf4b..800cd52 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -16269,7 +16269,7 @@ ix86_expand_vector_set (bool mmx_ok, rtx target, rtx val, int elt) /* op0 = A B X D */ emit_insn (gen_sse_shufps_1 (target, target, tmp, GEN_INT (1), GEN_INT (0), - GEN_INT (2), GEN_INT (3))); + GEN_INT (2+4), GEN_INT (3+4))); return; case 2: @@ -16277,7 +16277,7 @@ ix86_expand_vector_set (bool mmx_ok, rtx target, rtx val, int elt) ix86_expand_vector_set (false, target, val, 0); emit_insn (gen_sse_shufps_1 (target, target, tmp, GEN_INT (0), GEN_INT (1), - GEN_INT (0), GEN_INT (3))); + GEN_INT (0+4), GEN_INT (3+4))); return; case 3: @@ -16285,7 +16285,7 @@ ix86_expand_vector_set (bool mmx_ok, rtx target, rtx val, int elt) ix86_expand_vector_set (false, target, val, 0); emit_insn (gen_sse_shufps_1 (target, target, tmp, GEN_INT (0), GEN_INT (1), - GEN_INT (2), GEN_INT (0))); + GEN_INT (2+4), GEN_INT (0+4))); return; default: @@ -16395,7 +16395,7 @@ ix86_expand_vector_extract (bool mmx_ok, rtx target, rtx vec, int elt) tmp = gen_reg_rtx (mode); emit_insn (gen_sse_shufps_1 (tmp, vec, vec, GEN_INT (elt), GEN_INT (elt), - GEN_INT (elt), GEN_INT (elt))); + GEN_INT (elt+4), GEN_INT (elt+4))); break; case 2: |