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authorJeff Law <law@gcc.gnu.org>1999-01-12 17:02:31 -0700
committerJeff Law <law@gcc.gnu.org>1999-01-12 17:02:31 -0700
commita872728cc96704de89715ba6033b3200c56f477f (patch)
treee0f46c8782fad2b57be2c6a95e6e0ff93a2e6c35 /gcc
parent58f93603b6a030b7f74ed5fdef1cc78aa8b0e2d5 (diff)
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mips.h (LOAD_EXTEND_OP): Correct for SImode and CCmode moves when generating code for TARGET_64BIT.
0 * mips.h (LOAD_EXTEND_OP): Correct for SImode and CCmode moves when generating code for TARGET_64BIT. From-SVN: r24646
Diffstat (limited to 'gcc')
-rw-r--r--gcc/config/mips/mips.h11
1 files changed, 8 insertions, 3 deletions
diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h
index c0e5438..091a841 100644
--- a/gcc/config/mips/mips.h
+++ b/gcc/config/mips/mips.h
@@ -1,5 +1,5 @@
/* Definitions of target machine for GNU compiler. MIPS version.
- Copyright (C) 1989, 90-97, 1998 Free Software Foundation, Inc.
+ Copyright (C) 1989, 90-98, 1999 Free Software Foundation, Inc.
Contributed by A. Lichnewsky (lich@inria.inria.fr).
Changed by Michael Meissner (meissner@osf.org).
64 bit r4000 support by Ian Lance Taylor (ian@cygnus.com) and
@@ -1443,8 +1443,13 @@ do { \
/* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD
will either zero-extend or sign-extend. The value of this macro should
be the code that says which one of the two operations is implicitly
- done, NIL if none. */
-#define LOAD_EXTEND_OP(MODE) ZERO_EXTEND
+ done, NIL if none.
+
+ When in 64 bit mode, mips_move_1word will sign extend SImode and CCmode
+ moves. All other referces are zero extended. */
+#define LOAD_EXTEND_OP(MODE) \
+ (TARGET_64BIT && ((MODE) == SImode || (MODE) == CCmode) \
+ ? SIGN_EXTEND : ZERO_EXTEND)
/* Define this macro if it is advisable to hold scalars in registers
in a wider mode than that declared by the program. In such cases,