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authorJakub Jelinek <jakub@redhat.com>2019-01-18 00:34:42 +0100
committerJakub Jelinek <jakub@gcc.gnu.org>2019-01-18 00:34:42 +0100
commita85f2b9065e6e7c82f390419f5d065ef68e92846 (patch)
tree7c9d931dddd94242f9b62e3d4e80424cc8e3634a /gcc
parent77efc5c25c487ce50ff94bdee7494c6a87fda4f1 (diff)
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re PR target/88734 (AArch64's ACLE intrinsics give an ICE instead of compile error when option mismatch.)
PR target/88734 * config/aarch64/arm_neon.h: Fix #pragma GCC target syntax - replace (("..."))) with ("..."). Use arch=armv8.2-a+sha3 instead of arch=armv8.2-a+crypto for vsha512hq_u64 etc. intrinsics. From-SVN: r268049
Diffstat (limited to 'gcc')
-rw-r--r--gcc/ChangeLog7
-rw-r--r--gcc/config/aarch64/arm_neon.h10
2 files changed, 12 insertions, 5 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 32b153a..aa21399 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,10 @@
+2019-01-17 Jakub Jelinek <jakub@redhat.com>
+
+ PR target/88734
+ * config/aarch64/arm_neon.h: Fix #pragma GCC target syntax - replace
+ (("..."))) with ("..."). Use arch=armv8.2-a+sha3 instead of
+ arch=armv8.2-a+crypto for vsha512hq_u64 etc. intrinsics.
+
2019-01-17 Martin Sebor <msebor@redhat.com>
PR middle-end/88273
diff --git a/gcc/config/aarch64/arm_neon.h b/gcc/config/aarch64/arm_neon.h
index 90fce33..f405a32 100644
--- a/gcc/config/aarch64/arm_neon.h
+++ b/gcc/config/aarch64/arm_neon.h
@@ -33070,7 +33070,7 @@ vdotq_laneq_s32 (int32x4_t __r, int8x16_t __a, int8x16_t __b, const int __index)
#pragma GCC pop_options
#pragma GCC push_options
-#pragma GCC target(("arch=armv8.2-a+sm4"))
+#pragma GCC target ("arch=armv8.2-a+sm4")
__extension__ extern __inline uint32x4_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
@@ -33137,7 +33137,7 @@ vsm4ekeyq_u32 (uint32x4_t __a, uint32x4_t __b)
#pragma GCC pop_options
#pragma GCC push_options
-#pragma GCC target(("arch=armv8.2-a+crypto"))
+#pragma GCC target ("arch=armv8.2-a+sha3")
__extension__ extern __inline uint64x2_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
@@ -33299,10 +33299,10 @@ vbcaxq_s64 (int64x2_t __a, int64x2_t __b, int64x2_t __c)
/* AdvSIMD Complex numbers intrinsics. */
#pragma GCC push_options
-#pragma GCC target(("arch=armv8.3-a"))
+#pragma GCC target ("arch=armv8.3-a")
#pragma GCC push_options
-#pragma GCC target(("+fp16"))
+#pragma GCC target ("+fp16")
__extension__ extern __inline float16x4_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
vcadd_rot90_f16 (float16x4_t __a, float16x4_t __b)
@@ -33773,7 +33773,7 @@ vcmlaq_rot270_laneq_f32 (float32x4_t __r, float32x4_t __a, float32x4_t __b,
#pragma GCC pop_options
#pragma GCC push_options
-#pragma GCC target(("arch=armv8.2-a+fp16fml"))
+#pragma GCC target ("arch=armv8.2-a+fp16fml")
__extension__ extern __inline float32x2_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))