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| author | Ilya Enkovich <ilya.enkovich@intel.com> | 2015-02-25 15:05:48 +0000 |
|---|---|---|
| committer | Ilya Enkovich <ienkovich@gcc.gnu.org> | 2015-02-25 15:05:48 +0000 |
| commit | a2273e72f3bbb2ddbeb720e60f3f33d68530f5df (patch) | |
| tree | 38f2c159faf2827a2e0e4842481ea166392c88a9 /gcc | |
| parent | eeaccc07751f304cfe79fa5b7706264f6d56f5a5 (diff) | |
| download | gcc-a2273e72f3bbb2ddbeb720e60f3f33d68530f5df.zip gcc-a2273e72f3bbb2ddbeb720e60f3f33d68530f5df.tar.gz gcc-a2273e72f3bbb2ddbeb720e60f3f33d68530f5df.tar.bz2 | |
re PR target/65167 (ICE: in assign_by_spills, at lra-assigns.c:1383 (unable to find a register to spill) with -O -fschedule-insns -fcheck-pointer-bounds -mmpx)
gcc/
PR target/65167
* gcc/config/i386/i386.c (ix86_function_arg_regno_p): Support
bounds registers.
(avoid_func_arg_motion): Add dependencies for BNDSTX insns.
gcc/testsuite/
PR target/65167
* gcc.target/i386/pr65167.c: New.
From-SVN: r220970
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 7 | ||||
| -rw-r--r-- | gcc/config/i386/i386.c | 13 | ||||
| -rw-r--r-- | gcc/testsuite/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/i386/pr65167.c | 11 |
4 files changed, 36 insertions, 0 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 1e2b609..6e9faf9 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2015-02-25 Ilya Enkovich <ilya.enkovich@intel.com> + + PR target/65167 + * gcc/config/i386/i386.c (ix86_function_arg_regno_p): Support + bounds registers. + (avoid_func_arg_motion): Add dependencies for BNDSTX insns. + 2015-02-25 Alan Lawrence <alan.lawrence@arm.com> PR target/64997 diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index bc4fb4b..a1cb5da 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -6120,6 +6120,9 @@ ix86_function_arg_regno_p (int regno) int i; const int *parm_regs; + if (TARGET_MPX && BND_REGNO_P (regno)) + return true; + if (!TARGET_64BIT) { if (TARGET_MACHO) @@ -26898,6 +26901,16 @@ avoid_func_arg_motion (rtx_insn *first_arg, rtx_insn *insn) rtx set; rtx tmp; + /* Add anti dependencies for bounds stores. */ + if (INSN_P (insn) + && GET_CODE (PATTERN (insn)) == PARALLEL + && GET_CODE (XVECEXP (PATTERN (insn), 0, 0)) == UNSPEC + && XINT (XVECEXP (PATTERN (insn), 0, 0), 1) == UNSPEC_BNDSTX) + { + add_dependence (first_arg, insn, REG_DEP_ANTI); + return; + } + set = single_set (insn); if (!set) return; diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 49bf525..199b967 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2015-02-25 Ilya Enkovich <ilya.enkovich@intel.com> + + PR target/65167 + * gcc.target/i386/pr65167.c: New. + 2015-02-25 Kai Tietz <ktietz@redhat.com> PR tree-optimization/61917 diff --git a/gcc/testsuite/gcc.target/i386/pr65167.c b/gcc/testsuite/gcc.target/i386/pr65167.c new file mode 100644 index 0000000..35f3d6b --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr65167.c @@ -0,0 +1,11 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target mpx } */ +/* { dg-options "-O -fschedule-insns -fcheck-pointer-bounds -mmpx" } */ + +void bar(int *a, int *b, int *c, int *d, int *e, int *f); + +int foo (int *a, int *b, int *c, int *d, int *e, int *f) +{ + bar (a, b, c, d, e, f); + return *f; +} |