diff options
| author | Stuart Henderson <shenders@gcc.gnu.org> | 2011-05-03 15:09:19 +0000 |
|---|---|---|
| committer | Stuart Henderson <shenders@gcc.gnu.org> | 2011-05-03 15:09:19 +0000 |
| commit | 9f1112095c7ac4989e19db95602027681c698050 (patch) | |
| tree | e8c4c8a6fe49cb4811ec2bfeaf44b0a59ab96f55 /gcc | |
| parent | 0ecca7a6a6185daa25fa3253962155ae42c086b2 (diff) | |
| download | gcc-9f1112095c7ac4989e19db95602027681c698050.zip gcc-9f1112095c7ac4989e19db95602027681c698050.tar.gz gcc-9f1112095c7ac4989e19db95602027681c698050.tar.bz2 | |
re PR target/39768 (internal compiler error: RTL check: expected code 'const_int', have 'reg' in gen_rotlsi3, at config/bfin/bfin.md:1616)
2011-05-03 Stuart Henderson <shenders@gcc.gnu.org>
From Bernd Schmidt
* config/bfin/bfin.md (rotrsi, rotlsi): Don't take INTVAL of anything
that's not CONST_INT. Seemingly redundant check is due to PR39768.
From-SVN: r173310
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 6 | ||||
| -rw-r--r-- | gcc/config/bfin/bfin.md | 8 |
2 files changed, 10 insertions, 4 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index b2404b9..28f35e7 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,5 +1,11 @@ 2011-05-03 Stuart Henderson <shenders@gcc.gnu.org> + From Bernd Schmidt + * config/bfin/bfin.md (rotrsi, rotlsi): Don't take INTVAL of anything + that's not CONST_INT. Seemingly redundant check is due to PR39768. + +2011-05-03 Stuart Henderson <shenders@gcc.gnu.org> + From Jie Zhang: * config/bfin/uclinux.h (LINK_GCC_C_SEQUENCE_SPEC): Make sure libbffastfp overrides libgcc when -mfast-fp. diff --git a/gcc/config/bfin/bfin.md b/gcc/config/bfin/bfin.md index 4d22df5..6f2c7a6 100644 --- a/gcc/config/bfin/bfin.md +++ b/gcc/config/bfin/bfin.md @@ -1688,20 +1688,20 @@ (define_expand "rotlsi3" [(set (match_operand:SI 0 "register_operand" "") (rotate:SI (match_operand:SI 1 "register_operand" "") - (match_operand:SI 2 "immediate_operand" "")))] + (match_operand:SI 2 "const_int_operand" "")))] "" { - if (INTVAL (operands[2]) != 16) + if (GET_CODE (operands[2]) != CONST_INT || INTVAL (operands[2]) != 16) FAIL; }) (define_expand "rotrsi3" [(set (match_operand:SI 0 "register_operand" "") (rotatert:SI (match_operand:SI 1 "register_operand" "") - (match_operand:SI 2 "immediate_operand" "")))] + (match_operand:SI 2 "const_int_operand" "")))] "" { - if (INTVAL (operands[2]) != 16) + if (GET_CODE (operands[2]) != CONST_INT || INTVAL (operands[2]) != 16) FAIL; emit_insn (gen_rotl16 (operands[0], operands[1])); DONE; |