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author | Steve Ellcey <sellcey@imgtec.com> | 2015-06-18 15:17:49 +0000 |
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committer | Steve Ellcey <sje@gcc.gnu.org> | 2015-06-18 15:17:49 +0000 |
commit | 9ebfea12d2ee9263bdbf8ecd8e7b81e562bd3807 (patch) | |
tree | 3537c52221eee9683af638d97894033492d80e94 /gcc | |
parent | 769430b29ce63353fa10f5122e406578eaea3328 (diff) | |
download | gcc-9ebfea12d2ee9263bdbf8ecd8e7b81e562bd3807.zip gcc-9ebfea12d2ee9263bdbf8ecd8e7b81e562bd3807.tar.gz gcc-9ebfea12d2ee9263bdbf8ecd8e7b81e562bd3807.tar.bz2 |
mips.c (mips_rtx_costs): Remove HONOR_NAN check.
2015-06-18 Steve Ellcey <sellcey@imgtec.com>
* config/mips/mips.c (mips_rtx_costs): Remove HONOR_NAN check.
* config/mips/mips.md (*madd4<mode>): Ditto.
(*nmadd3<mode>) Ditto.
(*nmadd4<mode>_fastmath): Ditto.
(*nmadd3<mode>_fastmath): Ditto.
(*nmsub4<mode>): Ditto.
(*nmsub3<mode>): Ditto.
(*nmsub4<mode>_fastmath): Ditto.
(*nmsub3<mode>_fastmath): Ditto.
From-SVN: r224625
Diffstat (limited to 'gcc')
-rw-r--r-- | gcc/ChangeLog | 12 | ||||
-rw-r--r-- | gcc/config/mips/mips.c | 2 | ||||
-rw-r--r-- | gcc/config/mips/mips.md | 31 |
3 files changed, 27 insertions, 18 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index fef6cb9..f2ba06f 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,15 @@ +2015-06-18 Steve Ellcey <sellcey@imgtec.com> + + * config/mips/mips.c (mips_rtx_costs): Remove HONOR_NAN check. + * config/mips/mips.md (*madd4<mode>): Ditto. + (*nmadd3<mode>) Ditto. + (*nmadd4<mode>_fastmath): Ditto. + (*nmadd3<mode>_fastmath): Ditto. + (*nmsub4<mode>): Ditto. + (*nmsub3<mode>): Ditto. + (*nmsub4<mode>_fastmath): Ditto. + (*nmsub3<mode>_fastmath): Ditto. + 2015-06-18 Michael Matz <matz@suse.de> PR middle-end/66253 diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c index d427c0c..1c837cf 100644 --- a/gcc/config/mips/mips.c +++ b/gcc/config/mips/mips.c @@ -4069,7 +4069,6 @@ mips_rtx_costs (rtx x, int code, int outer_code, int opno ATTRIBUTE_UNUSED, if (float_mode_p && (ISA_HAS_NMADD4_NMSUB4 || ISA_HAS_NMADD3_NMSUB3) && TARGET_FUSED_MADD - && !HONOR_NANS (mode) && !HONOR_SIGNED_ZEROS (mode)) { /* See if we can use NMADD or NMSUB. See mips.md for the @@ -4137,7 +4136,6 @@ mips_rtx_costs (rtx x, int code, int outer_code, int opno ATTRIBUTE_UNUSED, if (float_mode_p && (ISA_HAS_NMADD4_NMSUB4 || ISA_HAS_NMADD3_NMSUB3) && TARGET_FUSED_MADD - && !HONOR_NANS (mode) && HONOR_SIGNED_ZEROS (mode)) { /* See if we can use NMADD or NMSUB. See mips.md for the diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md index 0a23fa2..f6912e1 100644 --- a/gcc/config/mips/mips.md +++ b/gcc/config/mips/mips.md @@ -2475,6 +2475,13 @@ ;; Floating point multiply accumulate instructions. +;; The various multiply accumulate instructions can be used even when +;; HONOR_NANS is true because while IEEE 754-2008 requires the negate +;; operation to negate the sign of a NAN and the MIPS neg instruction does +;; not do this, the multiply and add (or minus) parts of these instructions +;; have no requirement on how the sign of a NAN is handled and so the final +;; sign bit of the entire operation is undefined. + (define_insn "*madd4<mode>" [(set (match_operand:ANYF 0 "register_operand" "=f") (plus:ANYF (mult:ANYF (match_operand:ANYF 1 "register_operand" "f") @@ -2533,8 +2540,7 @@ (match_operand:ANYF 3 "register_operand" "f"))))] "ISA_HAS_NMADD4_NMSUB4 && TARGET_FUSED_MADD - && HONOR_SIGNED_ZEROS (<MODE>mode) - && !HONOR_NANS (<MODE>mode)" + && HONOR_SIGNED_ZEROS (<MODE>mode)" "nmadd.<fmt>\t%0,%3,%1,%2" [(set_attr "type" "fmadd") (set_attr "mode" "<UNITMODE>")]) @@ -2547,8 +2553,7 @@ (match_operand:ANYF 3 "register_operand" "0"))))] "ISA_HAS_NMADD3_NMSUB3 && TARGET_FUSED_MADD - && HONOR_SIGNED_ZEROS (<MODE>mode) - && !HONOR_NANS (<MODE>mode)" + && HONOR_SIGNED_ZEROS (<MODE>mode)" "nmadd.<fmt>\t%0,%1,%2" [(set_attr "type" "fmadd") (set_attr "mode" "<UNITMODE>")]) @@ -2561,8 +2566,7 @@ (match_operand:ANYF 3 "register_operand" "f")))] "ISA_HAS_NMADD4_NMSUB4 && TARGET_FUSED_MADD - && !HONOR_SIGNED_ZEROS (<MODE>mode) - && !HONOR_NANS (<MODE>mode)" + && !HONOR_SIGNED_ZEROS (<MODE>mode)" "nmadd.<fmt>\t%0,%3,%1,%2" [(set_attr "type" "fmadd") (set_attr "mode" "<UNITMODE>")]) @@ -2575,8 +2579,7 @@ (match_operand:ANYF 3 "register_operand" "0")))] "ISA_HAS_NMADD3_NMSUB3 && TARGET_FUSED_MADD - && !HONOR_SIGNED_ZEROS (<MODE>mode) - && !HONOR_NANS (<MODE>mode)" + && !HONOR_SIGNED_ZEROS (<MODE>mode)" "nmadd.<fmt>\t%0,%1,%2" [(set_attr "type" "fmadd") (set_attr "mode" "<UNITMODE>")]) @@ -2589,8 +2592,7 @@ (match_operand:ANYF 1 "register_operand" "f"))))] "ISA_HAS_NMADD4_NMSUB4 && TARGET_FUSED_MADD - && HONOR_SIGNED_ZEROS (<MODE>mode) - && !HONOR_NANS (<MODE>mode)" + && HONOR_SIGNED_ZEROS (<MODE>mode)" "nmsub.<fmt>\t%0,%1,%2,%3" [(set_attr "type" "fmadd") (set_attr "mode" "<UNITMODE>")]) @@ -2603,8 +2605,7 @@ (match_operand:ANYF 1 "register_operand" "0"))))] "ISA_HAS_NMADD3_NMSUB3 && TARGET_FUSED_MADD - && HONOR_SIGNED_ZEROS (<MODE>mode) - && !HONOR_NANS (<MODE>mode)" + && HONOR_SIGNED_ZEROS (<MODE>mode)" "nmsub.<fmt>\t%0,%1,%2" [(set_attr "type" "fmadd") (set_attr "mode" "<UNITMODE>")]) @@ -2617,8 +2618,7 @@ (match_operand:ANYF 3 "register_operand" "f"))))] "ISA_HAS_NMADD4_NMSUB4 && TARGET_FUSED_MADD - && !HONOR_SIGNED_ZEROS (<MODE>mode) - && !HONOR_NANS (<MODE>mode)" + && !HONOR_SIGNED_ZEROS (<MODE>mode)" "nmsub.<fmt>\t%0,%1,%2,%3" [(set_attr "type" "fmadd") (set_attr "mode" "<UNITMODE>")]) @@ -2631,8 +2631,7 @@ (match_operand:ANYF 3 "register_operand" "0"))))] "ISA_HAS_NMADD3_NMSUB3 && TARGET_FUSED_MADD - && !HONOR_SIGNED_ZEROS (<MODE>mode) - && !HONOR_NANS (<MODE>mode)" + && !HONOR_SIGNED_ZEROS (<MODE>mode)" "nmsub.<fmt>\t%0,%1,%2" [(set_attr "type" "fmadd") (set_attr "mode" "<UNITMODE>")]) |