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| author | Uros Bizjak <ubizjak@gmail.com> | 2016-04-25 00:03:15 +0200 |
|---|---|---|
| committer | Uros Bizjak <uros@gcc.gnu.org> | 2016-04-25 00:03:15 +0200 |
| commit | 9bb069e586de49f90f672ff6c3aaf54877c48b80 (patch) | |
| tree | 6eb1187bf22b0131728a933361d4872aff852168 /gcc | |
| parent | 55284a77e6cb0064c69e28b3121e7ae2a9f6d871 (diff) | |
| download | gcc-9bb069e586de49f90f672ff6c3aaf54877c48b80.zip gcc-9bb069e586de49f90f672ff6c3aaf54877c48b80.tar.gz gcc-9bb069e586de49f90f672ff6c3aaf54877c48b80.tar.bz2 | |
i386.md (*lea<mode>_general_4): Use const_0_to_3_operand predicate for operand 2.
* config/i386/i386.md (*lea<mode>_general_4): Use const_0_to_3_operand
predicate for operand 2.
From-SVN: r235397
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/config/i386/i386.md | 12 |
2 files changed, 10 insertions, 7 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 2ef411c..8e7059e 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2016-04-25 Uros Bizjak <ubizjak@gmail.com> + + * config/i386/i386.md (*lea<mode>_general_4): Use const_0_to_3_operand + predicate for operand 2. + 2016-04-24 Uros Bizjak <ubizjak@gmail.com> H.J. Lu <hongjiu.lu@intel.com> diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index 25be5ca..d7ac54e 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -6291,10 +6291,9 @@ (any_or:SWI12 (ashift:SWI12 (match_operand:SWI12 1 "index_register_operand" "l") - (match_operand:SWI12 2 "const_int_operand" "n")) + (match_operand:SWI12 2 "const_0_to_3_operand" "n")) (match_operand:SWI12 3 "const_int_operand" "n")))] "(!TARGET_PARTIAL_REG_STALL || optimize_function_for_size_p (cfun)) - && (unsigned HOST_WIDE_INT) INTVAL (operands[2]) <= 3 && ((unsigned HOST_WIDE_INT) INTVAL (operands[3]) < (HOST_WIDE_INT_1U << INTVAL (operands[2])))" "#" @@ -6316,11 +6315,10 @@ (any_or:SWI48 (ashift:SWI48 (match_operand:SWI48 1 "index_register_operand" "l") - (match_operand:SWI48 2 "const_int_operand" "n")) + (match_operand:SWI48 2 "const_0_to_3_operand" "n")) (match_operand:SWI48 3 "const_int_operand" "n")))] - "(unsigned HOST_WIDE_INT) INTVAL (operands[2]) <= 3 - && ((unsigned HOST_WIDE_INT) INTVAL (operands[3]) - < (HOST_WIDE_INT_1U << INTVAL (operands[2])))" + "(unsigned HOST_WIDE_INT) INTVAL (operands[3]) + < (HOST_WIDE_INT_1U << INTVAL (operands[2]))" "#" "&& reload_completed" [(set (match_dup 0) @@ -7955,7 +7953,7 @@ if (len == HOST_BITS_PER_WIDE_INT) mask = -1; else - mask = ((HOST_WIDE_INT)1 << len) - 1; + mask = (HOST_WIDE_INT_1 << len) - 1; mask <<= pos; operands[2] = gen_rtx_AND (mode, val, gen_int_mode (mask, mode)); |