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| author | Andrew Bennett <andrew.bennett@imgtec.com> | 2015-07-07 16:07:51 +0000 |
|---|---|---|
| committer | Andrew Bennett <abennett@gcc.gnu.org> | 2015-07-07 16:07:51 +0000 |
| commit | 9b20858a9ba7039a12cef6e724e541bdcce2ba25 (patch) | |
| tree | cf9fc41dd87a98f31149ec133276ad0297bba69d /gcc | |
| parent | 98e30e515f184bd63196d4d500a682fbfeb9635e (diff) | |
| download | gcc-9b20858a9ba7039a12cef6e724e541bdcce2ba25.zip gcc-9b20858a9ba7039a12cef6e724e541bdcce2ba25.tar.gz gcc-9b20858a9ba7039a12cef6e724e541bdcce2ba25.tar.bz2 | |
MIPS: Do not generate micromips code for the no-smartmips-lwxs.c testcase
The LWXS instruction is part of the micromips ISA which means it is
valid to generate it for the no-smartmips-lwxs.c testcase.
testsuite/
* gcc.target/mips/no-smartmips-lwxs.c: Change NOMIPS16 to
NOCOMPRESSION.
From-SVN: r225519
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/testsuite/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/mips/no-smartmips-lwxs.c | 2 |
2 files changed, 6 insertions, 1 deletions
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index d9fa97a..b2e0e98 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2015-07-07 Andrew Bennett <andrew.bennett@imgtec.com> + + * gcc.target/mips/no-smartmips-lwxs.c: Change NOMIPS16 to + NOCOMPRESSION. + 2015-07-07 Richard Biener <rguenther@suse.de> * gcc.dg/vect/vect-over-widen-3-big-array.c: Adjust. diff --git a/gcc/testsuite/gcc.target/mips/no-smartmips-lwxs.c b/gcc/testsuite/gcc.target/mips/no-smartmips-lwxs.c index ecf856e..e94677f 100644 --- a/gcc/testsuite/gcc.target/mips/no-smartmips-lwxs.c +++ b/gcc/testsuite/gcc.target/mips/no-smartmips-lwxs.c @@ -1,7 +1,7 @@ /* { dg-do compile } */ /* { dg-options "-mno-smartmips" } */ -NOMIPS16 int scaled_indexed_word_load (int a[], int b) +NOCOMPRESSION int scaled_indexed_word_load (int a[], int b) { return a[b]; } |