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| author | Uros Bizjak <uros@gcc.gnu.org> | 2018-12-10 16:47:16 +0100 |
|---|---|---|
| committer | Uros Bizjak <uros@gcc.gnu.org> | 2018-12-10 16:47:16 +0100 |
| commit | 98900a06642a7c10751720a26f8cbca359d89fa3 (patch) | |
| tree | 508895ef8288fde3b2ae4f741d5db2294a3a8782 /gcc | |
| parent | 87e4fbdd9a250c77279637c7d4475e0e7bccbdb5 (diff) | |
| download | gcc-98900a06642a7c10751720a26f8cbca359d89fa3.zip gcc-98900a06642a7c10751720a26f8cbca359d89fa3.tar.gz gcc-98900a06642a7c10751720a26f8cbca359d89fa3.tar.bz2 | |
re PR target/88418 (ICE in extract_insn, at recog.c:2305 (error: unrecognizable insn))
PR target/88418
* config/i386/i386.c (ix86_expand_sse_cmp): For vector modes,
check operand 1 with vector_operand predicate.
(ix86_expand_sse_movcc): For vector modes, check op_true with
vector_operand, not nonimmediate_operand.
testsuite/ChangeLog:
PR target/88418
* gcc.target/i386/pr88418.c: New test.
From-SVN: r266958
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 8 | ||||
| -rw-r--r-- | gcc/config/i386/i386.c | 11 | ||||
| -rw-r--r-- | gcc/testsuite/ChangeLog | 13 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/i386/pr88418.c | 15 |
4 files changed, 39 insertions, 8 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 08354fa..3c5e3ed 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,11 @@ +2018-12-10 Uros Bizjak <ubizjak@gmail.com> + + PR target/88418 + * config/i386/i386.c (ix86_expand_sse_cmp): For vector modes, + check operand 1 with vector_operand predicate. + (ix86_expand_sse_movcc): For vector modes, check op_true with + vector_operand, not nonimmediate_operand. + 2018-12-10 Richard Biener <rguenther@suse.de> * tree-affine.c (tree_to_aff_combination): Remove unreachable diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index 1d7b1f0..e86c39e 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -23483,7 +23483,7 @@ ix86_expand_sse_fp_minmax (rtx dest, enum rtx_code code, rtx cmp_op0, return true; } -/* Expand an sse vector comparison. Return the register with the result. */ +/* Expand an SSE comparison. Return the register with the result. */ static rtx ix86_expand_sse_cmp (rtx dest, enum rtx_code code, rtx cmp_op0, rtx cmp_op1, @@ -23508,9 +23508,12 @@ ix86_expand_sse_cmp (rtx dest, enum rtx_code code, rtx cmp_op0, rtx cmp_op1, else cmp_mode = cmp_ops_mode; - cmp_op0 = force_reg (cmp_ops_mode, cmp_op0); - if (!nonimmediate_operand (cmp_op1, cmp_ops_mode)) + + int (*op1_predicate)(rtx, machine_mode) + = VECTOR_MODE_P (cmp_ops_mode) ? vector_operand : nonimmediate_operand; + + if (!op1_predicate (cmp_op1, cmp_ops_mode)) cmp_op1 = force_reg (cmp_ops_mode, cmp_op1); if (optimize @@ -23627,7 +23630,7 @@ ix86_expand_sse_movcc (rtx dest, rtx cmp, rtx op_true, rtx op_false) rtx (*gen) (rtx, rtx, rtx, rtx) = NULL; rtx d = dest; - if (!nonimmediate_operand (op_true, mode)) + if (!vector_operand (op_true, mode)) op_true = force_reg (mode, op_true); op_false = force_reg (mode, op_false); diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 2d5b366..babcb6c 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2018-12-10 Uros Bizjak <ubizjak@gmail.com> + + PR target/88418 + * gcc.target/i386/pr88418.c: New test. + 2018-12-10 Richard Biener <rguenther@suse.de> PR tree-optimization/88427 @@ -20,7 +25,7 @@ * gcc.dg/vect/vect-ivdep-2.c: Likewise. * gcc.dg/vect/nodump-vect-opt-info-1.c: Likewise. * g++.dg/vect/pr33426-ivdep.cc: Likewise. - * g++.dg/vect/pr33426-ivdep-2.cc: Likewise. + * g++.dg/vect/pr33426-ivdep-2.cc: Likewise. * g++.dg/vect/pr33426-ivdep-3.cc: Likewise. * g++.dg/vect/pr33426-ivdep-4.cc: Likewise. @@ -254,7 +259,7 @@ * gcc.dg/tree-ssa/ssa-dom-thread-7.c: Skip the post switch conversion tests on aarch64. * gcc.dg/tree-ssa/pr77445-2.c: Similarly. - + 2018-12-06 David Malcolm <dmalcolm@redhat.com> PR c++/85110 @@ -940,8 +945,8 @@ * lib/target-supports.exp (check_effective_target_logical_op_short_circuit): Add msp430. - (check_effective_target_int_eq_float): New. - (check_effective_target_ptr_eq_long): New. + (check_effective_target_int_eq_float): New. + (check_effective_target_ptr_eq_long): New. * c-c++-common/pr41779.c: Require int_eq_float for dg-warning tests. * c-c++-common/pr57371-2.c: XFAIL optimized dump scan when sizeof (float) != sizeof (int). diff --git a/gcc/testsuite/gcc.target/i386/pr88418.c b/gcc/testsuite/gcc.target/i386/pr88418.c new file mode 100644 index 0000000..c348b19 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr88418.c @@ -0,0 +1,15 @@ +/* PR target/88418 */ +/* { dg-do compile } */ +/* { dg-options "-O1 -fpack-struct -msse4.1" } */ + +typedef long long v2di __attribute__ ((__vector_size__ (16))); + +union df { + v2di se[2]; +}; + +void +qg (union df *jz, union df *pl) +{ + jz->se[0] = jz->se[0] == pl->se[0]; +} |