re PR target/50457 (SH2A atomic functions)

	PR target/50457
	* config/sh/sh.c (parse_validate_atomic_model_option): Handle name
	strings in sh_atomic_model.
	* config/sh/sh.h (TARGET_CPU_CPP_BUILTINS): Move macro implementation
	to ...
	* config/sh/sh-c.c (sh_cpu_cpp_builtins): ... this new function.
	Add __SH1__ and __SH2__ defines.  Add __SH_ATOMIC_MODEL_*__ define.
	* config/sh/sh-protos.h (sh_atomic_model): Add name and cdef_name
	variables.
	(sh_cpu_cpp_builtins): Declare new function.

	PR target/50457
	* config/sh/linux-atomic.S: Delete.
	* config/sh/linux-atomic.c: New.
	* config/sh/t-linux (LIB2ADD): Replace linux-atomic.S with
	linux-atomic.c.  Add cflags to disable warnings.

From-SVN: r192051

5 files changed, 119 insertions, 70 deletions

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index b51cbbd..fcdeec9 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,16 @@
+2012-10-03  Oleg Endo  <olegendo@gcc.gnu.org>
+
+	PR target/50457
+	* config/sh/sh.c (parse_validate_atomic_model_option): Handle name
+	strings in sh_atomic_model.
+	* config/sh/sh.h (TARGET_CPU_CPP_BUILTINS): Move macro implementation
+	to ...
+	* config/sh/sh-c.c (sh_cpu_cpp_builtins): ... this new function.
+	Add __SH1__ and __SH2__ defines.  Add __SH_ATOMIC_MODEL_*__ define.
+	* config/sh/sh-protos.h (sh_atomic_model): Add name and cdef_name
+	variables.
+	(sh_cpu_cpp_builtins): Declare new function.
+
 2012-10-03  Dehao Chen  <dehao@google.com>
 
 	PR middle-end/54782
diff --git a/gcc/config/sh/sh-c.c b/gcc/config/sh/sh-c.c
index 2fdff54..94c5f99 100644
--- a/gcc/config/sh/sh-c.c
+++ b/gcc/config/sh/sh-c.c
@@ -25,6 +25,9 @@ along with GCC; see the file COPYING3.  If not see
 #include "tm.h"
 #include "tree.h"
 #include "tm_p.h"
+#include "cpplib.h"
+#include "c-family/c-common.h"
+#include "target.h"
 
 /* Handle machine specific pragmas to be semi-compatible with Renesas
    compiler.  */
@@ -66,3 +69,79 @@ sh_pr_nosave_low_regs (struct cpp_reader *pfile ATTRIBUTE_UNUSED)
 {
   sh_add_function_attribute ("nosave_low_regs");
 }
+
+#define builtin_define(TXT) cpp_define (pfile, TXT)
+#define builtin_assert(TXT) cpp_assert (pfile, TXT)
+
+/* Implement the TARGET_CPU_CPP_BUILTINS macro  */
+void
+sh_cpu_cpp_builtins (cpp_reader* pfile)
+{
+  builtin_define ("__sh__");
+  builtin_assert ("cpu=sh");
+  builtin_assert ("machine=sh");
+  switch ((int) sh_cpu)
+    {
+    case PROCESSOR_SH1:
+      builtin_define ("__sh1__");
+      builtin_define ("__SH1__");
+      break;
+    case PROCESSOR_SH2:
+      builtin_define ("__sh2__");
+      builtin_define ("__SH2__");
+      break;
+    case PROCESSOR_SH2E:
+      builtin_define ("__SH2E__");
+      break;
+    case PROCESSOR_SH2A:
+      builtin_define ("__SH2A__");
+      if (TARGET_SH2A_DOUBLE)
+	builtin_define (TARGET_FPU_SINGLE
+			? "__SH2A_SINGLE__" : "__SH2A_DOUBLE__");
+      else
+	builtin_define (TARGET_FPU_ANY
+			? "__SH2A_SINGLE_ONLY__" : "__SH2A_NOFPU__");
+      break;
+    case PROCESSOR_SH3:
+      builtin_define ("__sh3__");
+      builtin_define ("__SH3__");
+      if (TARGET_HARD_SH4)
+	builtin_define ("__SH4_NOFPU__");
+      break;
+    case PROCESSOR_SH3E:
+      builtin_define (TARGET_HARD_SH4 ? "__SH4_SINGLE_ONLY__" : "__SH3E__");
+      break;
+    case PROCESSOR_SH4:
+      builtin_define (TARGET_FPU_SINGLE ? "__SH4_SINGLE__" : "__SH4__");
+      break;
+    case PROCESSOR_SH4A: \
+      builtin_define ("__SH4A__");
+      builtin_define (TARGET_SH4
+		      ? (TARGET_FPU_SINGLE ? "__SH4_SINGLE__" : "__SH4__")
+		      : TARGET_FPU_ANY ? "__SH4_SINGLE_ONLY__"
+		      : "__SH4_NOFPU__");
+      break;
+    case PROCESSOR_SH5:
+      {
+	builtin_define_with_value ("__SH5__",
+				   TARGET_SHMEDIA64 ? "64" : "32", 0);
+	builtin_define_with_value ("__SHMEDIA__",
+				   TARGET_SHMEDIA ? "1" : "0", 0);
+	if (! TARGET_FPU_DOUBLE)
+	  builtin_define ("__SH4_NOFPU__");
+      }
+    }
+  if (TARGET_FPU_ANY)
+    builtin_define ("__SH_FPU_ANY__");
+  if (TARGET_FPU_DOUBLE)
+    builtin_define ("__SH_FPU_DOUBLE__");
+  if (TARGET_HITACHI)
+    builtin_define ("__HITACHI__");
+  if (TARGET_FMOVD)
+    builtin_define ("__FMOVD_ENABLED__");
+  builtin_define (TARGET_LITTLE_ENDIAN
+		  ? "__LITTLE_ENDIAN__" : "__BIG_ENDIAN__");
+
+  cpp_define_formatted (pfile, "__SH_ATOMIC_MODEL_%s__",
+			selected_atomic_model ().cdef_name);
+}
diff --git a/gcc/config/sh/sh-protos.h b/gcc/config/sh/sh-protos.h
index 135a5c4..d908110 100644
--- a/gcc/config/sh/sh-protos.h
+++ b/gcc/config/sh/sh-protos.h
@@ -55,6 +55,14 @@ struct sh_atomic_model
       happen on SH4A.  */
   bool strict;
   enum_type type;
+
+  /* Name string as it was specified on the command line.  */
+  const char* name;
+
+  /* Name string as it is used in C/C++ defines.  */
+  const char* cdef_name;
+
+  /* GBR offset variable for TCB model.  */
   int tcb_gbr_offset;
 };
 
@@ -156,6 +164,8 @@ extern void sh_canonicalize_comparison (enum rtx_code&, rtx&, rtx&,
 
 #endif /* RTX_CODE */
 
+extern void sh_cpu_cpp_builtins (cpp_reader* pfile);
+
 extern const char *output_jump_label_table (void);
 extern rtx get_t_reg_rtx (void);
 extern rtx get_fpscr_rtx (void);
diff --git a/gcc/config/sh/sh.c b/gcc/config/sh/sh.c
index ebfacbb..9f6b796 100644
--- a/gcc/config/sh/sh.c
+++ b/gcc/config/sh/sh.c
@@ -619,8 +619,17 @@ parse_validate_atomic_model_option (const char* str)
   model_names[sh_atomic_model::soft_tcb] = "soft-tcb";
   model_names[sh_atomic_model::soft_imask] = "soft-imask";
 
+  const char* model_cdef_names[sh_atomic_model::num_models];
+  model_cdef_names[sh_atomic_model::none] = "NONE";
+  model_cdef_names[sh_atomic_model::soft_gusa] = "SOFT_GUSA";
+  model_cdef_names[sh_atomic_model::hard_llcs] = "HARD_LLCS";
+  model_cdef_names[sh_atomic_model::soft_tcb] = "SOFT_TCB";
+  model_cdef_names[sh_atomic_model::soft_imask] = "SOFT_IMASK";
+
   sh_atomic_model ret;
   ret.type = sh_atomic_model::none;
+  ret.name = model_names[sh_atomic_model::none];
+  ret.cdef_name = model_cdef_names[sh_atomic_model::none];
   ret.strict = false;
   ret.tcb_gbr_offset = -1;
 
@@ -646,6 +655,8 @@ parse_validate_atomic_model_option (const char* str)
       if (tokens.front () == model_names[i])
 	{
 	  ret.type = (sh_atomic_model::enum_type)i;
+	  ret.name = model_names[i];
+	  ret.cdef_name = model_cdef_names[i];
 	  goto got_mode_name;
 	}
 
@@ -677,25 +688,23 @@ got_mode_name:;
 
   if (ret.type == sh_atomic_model::soft_gusa && !TARGET_SH3)
     err_ret ("atomic model %s is only available on SH3 and SH4 targets",
-	     model_names[ret.type]);
+	     ret.name);
 
   if (ret.type == sh_atomic_model::hard_llcs && !TARGET_SH4A)
-    err_ret ("atomic model %s is only available on SH4A targets",
-	     model_names[ret.type]);
+    err_ret ("atomic model %s is only available on SH4A targets", ret.name);
 
   if (ret.type == sh_atomic_model::soft_tcb && ret.tcb_gbr_offset == -1)
-    err_ret ("atomic model %s requires gbr-offset parameter", 
-	     model_names[ret.type]);
+    err_ret ("atomic model %s requires gbr-offset parameter", ret.name);
 
   if (ret.type == sh_atomic_model::soft_tcb
       && (ret.tcb_gbr_offset < 0 || ret.tcb_gbr_offset > 1020
           || (ret.tcb_gbr_offset & 3) != 0))
     err_ret ("invalid gbr-offset value \"%d\" for atomic model %s; it must be "
 	     "a multiple of 4 in the range 0-1020", ret.tcb_gbr_offset,
-	     model_names[ret.type]);
+	     ret.name);
 
   if (ret.type == sh_atomic_model::soft_imask && TARGET_USERMODE)
-    err_ret ("cannot use atomic model %s in user mode", model_names[ret.type]);
+    err_ret ("cannot use atomic model %s in user mode", ret.name);
 
   return ret;
 
diff --git a/gcc/config/sh/sh.h b/gcc/config/sh/sh.h
index 546cb6f..5287526 100644
--- a/gcc/config/sh/sh.h
+++ b/gcc/config/sh/sh.h
@@ -31,69 +31,7 @@ along with GCC; see the file COPYING3.  If not see
 /* ??? No longer true.  */
 extern int code_for_indirect_jump_scratch;
 
-#define TARGET_CPU_CPP_BUILTINS() \
-do { \
-  builtin_define ("__sh__"); \
-  builtin_assert ("cpu=sh"); \
-  builtin_assert ("machine=sh"); \
-  switch ((int) sh_cpu) \
-    { \
-    case PROCESSOR_SH1: \
-      builtin_define ("__sh1__"); \
-      break; \
-    case PROCESSOR_SH2: \
-      builtin_define ("__sh2__"); \
-      break; \
-    case PROCESSOR_SH2E: \
-      builtin_define ("__SH2E__"); \
-      break; \
-    case PROCESSOR_SH2A: \
-      builtin_define ("__SH2A__"); \
-      builtin_define (TARGET_SH2A_DOUBLE \
-		      ? (TARGET_FPU_SINGLE ? "__SH2A_SINGLE__" : "__SH2A_DOUBLE__") \
-		      : TARGET_FPU_ANY ? "__SH2A_SINGLE_ONLY__" \
-		      : "__SH2A_NOFPU__"); \
-      break; \
-    case PROCESSOR_SH3: \
-      builtin_define ("__sh3__"); \
-      builtin_define ("__SH3__"); \
-      if (TARGET_HARD_SH4) \
-	builtin_define ("__SH4_NOFPU__"); \
-      break; \
-    case PROCESSOR_SH3E: \
-      builtin_define (TARGET_HARD_SH4 ? "__SH4_SINGLE_ONLY__" : "__SH3E__"); \
-      break; \
-    case PROCESSOR_SH4: \
-      builtin_define (TARGET_FPU_SINGLE ? "__SH4_SINGLE__" : "__SH4__"); \
-      break; \
-    case PROCESSOR_SH4A: \
-      builtin_define ("__SH4A__"); \
-      builtin_define (TARGET_SH4 \
-		      ? (TARGET_FPU_SINGLE ? "__SH4_SINGLE__" : "__SH4__") \
-		      : TARGET_FPU_ANY ? "__SH4_SINGLE_ONLY__" \
-		      : "__SH4_NOFPU__"); \
-      break; \
-    case PROCESSOR_SH5: \
-      { \
-	builtin_define_with_value ("__SH5__", \
-				   TARGET_SHMEDIA64 ? "64" : "32", 0); \
-	builtin_define_with_value ("__SHMEDIA__", \
-				   TARGET_SHMEDIA ? "1" : "0", 0); \
-	if (! TARGET_FPU_DOUBLE) \
-	  builtin_define ("__SH4_NOFPU__"); \
-      } \
-    } \
-  if (TARGET_FPU_ANY) \
-    builtin_define ("__SH_FPU_ANY__"); \
-  if (TARGET_FPU_DOUBLE) \
-    builtin_define ("__SH_FPU_DOUBLE__"); \
-  if (TARGET_HITACHI) \
-    builtin_define ("__HITACHI__"); \
-  if (TARGET_FMOVD) \
-    builtin_define ("__FMOVD_ENABLED__"); \
-  builtin_define (TARGET_LITTLE_ENDIAN \
-		  ? "__LITTLE_ENDIAN__" : "__BIG_ENDIAN__"); \
-} while (0)
+#define TARGET_CPU_CPP_BUILTINS() sh_cpu_cpp_builtins (pfile)
 
 /* Value should be nonzero if functions must have frame pointers.
    Zero means the frame pointer need not be set up (and parms may be accessed