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authorMichael Meissner <meissner@gcc.gnu.org>1994-08-28 03:22:52 +0000
committerMichael Meissner <meissner@gcc.gnu.org>1994-08-28 03:22:52 +0000
commit91f0226f7c244dc65396fd1a6e61e2e7464c8da1 (patch)
tree59d6e2a028cdb5a679da1a68641cba260a2b395a /gcc
parente9954ee434e38d801b463328d9cf2d7fbba24f9a (diff)
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Fix indexing off arg ptr & push of byte values.
From-SVN: r7994
Diffstat (limited to 'gcc')
-rw-r--r--gcc/config/i386/i386.c9
-rw-r--r--gcc/config/i386/i386.h2
-rw-r--r--gcc/config/i386/i386.md18
3 files changed, 16 insertions, 13 deletions
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index 389f6eb..ddfb4ee 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -1076,6 +1076,15 @@ legitimate_address_p (mode, addr, strict)
else
disp = addr; /* displacement */
+ /* Allow arg pointer and stack pointer as index if there is not scaling */
+ if (base && indx && !scale
+ && (indx == arg_pointer_rtx || indx == stack_pointer_rtx))
+ {
+ rtx tmp = base;
+ base = indx;
+ indx = tmp;
+ }
+
/* Validate base register */
if (base)
{
diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h
index e50e7f9..1bc8048 100644
--- a/gcc/config/i386/i386.h
+++ b/gcc/config/i386/i386.h
@@ -498,7 +498,7 @@ enum reg_class
0x3, /* AD_REGS */ \
0xf, /* Q_REGS */ \
0x10, 0x20, /* SIREG, DIREG */ \
- 0x1007f, /* INDEX_REGS */ \
+ 0x07f, /* INDEX_REGS */ \
0x100ff, /* GENERAL_REGS */ \
0x0100, 0x0200, /* FP_TOP_REG, FP_SECOND_REG */ \
0xff00, /* FLOAT_REGS */ \
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index 04b3a1e..1b6017e 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -778,8 +778,7 @@
else if (TARGET_MOVE
&& (reload_in_progress | reload_completed) == 0
&& GET_CODE (operands[0]) == MEM
- && GET_CODE (operands[1]) == MEM
- && (!TARGET_386 || !push_operand (operands[0], SImode)))
+ && GET_CODE (operands[1]) == MEM)
{
operands[1] = force_reg (SImode, operands[1]);
}
@@ -842,8 +841,7 @@
if (TARGET_MOVE
&& (reload_in_progress | reload_completed) == 0
&& GET_CODE (operands[0]) == MEM
- && GET_CODE (operands[1]) == MEM
- && (!TARGET_386 || !push_operand (operands[0], HImode)))
+ && GET_CODE (operands[1]) == MEM)
{
operands[1] = force_reg (HImode, operands[1]);
}
@@ -892,8 +890,7 @@
if (TARGET_MOVE
&& (reload_in_progress | reload_completed) == 0
&& GET_CODE (operands[0]) == MEM
- && GET_CODE (operands[1]) == MEM
- && (!TARGET_386 || !push_operand (operands[0], HImode)))
+ && GET_CODE (operands[1]) == MEM)
{
operands[1] = force_reg (HImode, operands[1]);
}
@@ -969,8 +966,7 @@
if (TARGET_MOVE
&& (reload_in_progress | reload_completed) == 0
&& GET_CODE (operands[0]) == MEM
- && GET_CODE (operands[1]) == MEM
- && (!TARGET_386 || !push_operand (operands[0], QImode)))
+ && GET_CODE (operands[1]) == MEM)
{
operands[1] = force_reg (QImode, operands[1]);
}
@@ -1024,8 +1020,7 @@
if (TARGET_MOVE
&& (reload_in_progress | reload_completed) == 0
&& GET_CODE (operands[0]) == MEM
- && GET_CODE (operands[1]) == MEM
- && (!TARGET_386 || !push_operand (operands[0], QImode)))
+ && GET_CODE (operands[1]) == MEM)
{
operands[1] = force_reg (QImode, operands[1]);
}
@@ -1384,8 +1379,7 @@
if (TARGET_MOVE
&& (reload_in_progress | reload_completed) == 0
&& GET_CODE (operands[0]) == MEM
- && GET_CODE (operands[1]) == MEM
- && (!TARGET_386 || !push_operand (operands[0], QImode)))
+ && GET_CODE (operands[1]) == MEM)
{
operands[1] = force_reg (DImode, operands[1]);
}