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authorKai Tietz <kai.tietz@onevision.com>2008-06-03 13:22:36 +0000
committerKai Tietz <ktietz@gcc.gnu.org>2008-06-03 15:22:36 +0200
commit90b484920aac380b54197200a758cb48702b7c5c (patch)
treed186e13e99bc64644bc637cc64efad2547ff216c /gcc
parent8a762fcb17567f2ee82efd7bd7422110b380375b (diff)
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i386.md (define_mode_iterator P): New.
2008-06-03 Kai Tietz <kai.tietz@onevision.com> * config/i386/i386.md (define_mode_iterator P): New. (split): Merged XF and DF rules using P. From-SVN: r136320
Diffstat (limited to 'gcc')
-rw-r--r--gcc/ChangeLog5
-rw-r--r--gcc/config/i386/i386.md70
2 files changed, 23 insertions, 52 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 655be11..928e79e 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,5 +1,10 @@
2008-06-03 Kai Tietz <kai.tietz@onevision.com>
+ * config/i386/i386.md (define_mode_iterator P): New.
+ (split): Merged XF and DF rules using P.
+
+2008-06-03 Kai Tietz <kai.tietz@onevision.com>
+
* config/i386/i386-protos.h (ix86_reg_parm_stack_space): New.
* config/i386/i386.h (ix86_reg_parm_stack_space): Removed
prototype.
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index ba438fe..00a16d9 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -630,6 +630,11 @@
;; Instruction suffix for REX 64bit operators.
(define_mode_attr rex64suffix [(SI "") (DI "{q}")])
+
+;; This mode iterator allows :P to be used for patterns that operate on
+;; pointer-sized quantities. Exactly one of the two alternatives will match.
+(define_mode_iterator P [(SI "Pmode == SImode") (DI "Pmode == DImode")])
+
;; Scheduling descriptions
@@ -2735,17 +2740,9 @@
(define_split
[(set (match_operand:DF 0 "push_operand" "")
(match_operand:DF 1 "any_fp_register_operand" ""))]
- "!TARGET_64BIT && reload_completed"
- [(set (reg:SI SP_REG) (plus:SI (reg:SI SP_REG) (const_int -8)))
- (set (mem:DF (reg:SI SP_REG)) (match_dup 1))]
- "")
-
-(define_split
- [(set (match_operand:DF 0 "push_operand" "")
- (match_operand:DF 1 "any_fp_register_operand" ""))]
- "TARGET_64BIT && reload_completed"
- [(set (reg:DI SP_REG) (plus:DI (reg:DI SP_REG) (const_int -8)))
- (set (mem:DF (reg:DI SP_REG)) (match_dup 1))]
+ "reload_completed"
+ [(set (reg:P SP_REG) (plus:P (reg:P SP_REG) (const_int -8)))
+ (set (mem:DF (reg:P SP_REG)) (match_dup 1))]
"")
(define_split
@@ -3198,17 +3195,9 @@
(define_split
[(set (match_operand:XF 0 "push_operand" "")
(match_operand:XF 1 "any_fp_register_operand" ""))]
- "!TARGET_64BIT"
- [(set (reg:SI SP_REG) (plus:SI (reg:SI SP_REG) (match_dup 2)))
- (set (mem:XF (reg:SI SP_REG)) (match_dup 1))]
- "operands[2] = GEN_INT (TARGET_128BIT_LONG_DOUBLE ? -16 : -12);")
-
-(define_split
- [(set (match_operand:XF 0 "push_operand" "")
- (match_operand:XF 1 "any_fp_register_operand" ""))]
- "TARGET_64BIT"
- [(set (reg:DI SP_REG) (plus:DI (reg:DI SP_REG) (match_dup 2)))
- (set (mem:XF (reg:DI SP_REG)) (match_dup 1))]
+ ""
+ [(set (reg:P SP_REG) (plus:P (reg:P SP_REG) (match_dup 2)))
+ (set (mem:XF (reg:P SP_REG)) (match_dup 1))]
"operands[2] = GEN_INT (TARGET_128BIT_LONG_DOUBLE ? -16 : -12);")
;; Do not use integer registers when optimizing for size
@@ -3951,16 +3940,9 @@
(define_split
[(set (match_operand:DF 0 "push_operand" "")
(float_extend:DF (match_operand:SF 1 "fp_register_operand" "")))]
- "!TARGET_64BIT"
- [(set (reg:SI SP_REG) (plus:SI (reg:SI SP_REG) (const_int -8)))
- (set (mem:DF (reg:SI SP_REG)) (float_extend:DF (match_dup 1)))])
-
-(define_split
- [(set (match_operand:DF 0 "push_operand" "")
- (float_extend:DF (match_operand:SF 1 "fp_register_operand" "")))]
- "TARGET_64BIT"
- [(set (reg:DI SP_REG) (plus:DI (reg:DI SP_REG) (const_int -8)))
- (set (mem:DF (reg:DI SP_REG)) (float_extend:DF (match_dup 1)))])
+ ""
+ [(set (reg:P SP_REG) (plus:P (reg:P SP_REG) (const_int -8)))
+ (set (mem:DF (reg:P SP_REG)) (float_extend:DF (match_dup 1)))])
(define_insn "*dummy_extendsfxf2"
[(set (match_operand:XF 0 "push_operand" "=<")
@@ -3972,32 +3954,16 @@
[(set (match_operand:XF 0 "push_operand" "")
(float_extend:XF (match_operand:SF 1 "fp_register_operand" "")))]
""
- [(set (reg:SI SP_REG) (plus:SI (reg:SI SP_REG) (match_dup 2)))
- (set (mem:XF (reg:SI SP_REG)) (float_extend:XF (match_dup 1)))]
- "operands[2] = GEN_INT (TARGET_128BIT_LONG_DOUBLE ? -16 : -12);")
-
-(define_split
- [(set (match_operand:XF 0 "push_operand" "")
- (float_extend:XF (match_operand:SF 1 "fp_register_operand" "")))]
- "TARGET_64BIT"
- [(set (reg:DI SP_REG) (plus:DI (reg:DI SP_REG) (match_dup 2)))
- (set (mem:DF (reg:DI SP_REG)) (float_extend:XF (match_dup 1)))]
+ [(set (reg:P SP_REG) (plus:P (reg:P SP_REG) (match_dup 2)))
+ (set (mem:XF (reg:P SP_REG)) (float_extend:XF (match_dup 1)))]
"operands[2] = GEN_INT (TARGET_128BIT_LONG_DOUBLE ? -16 : -12);")
(define_split
[(set (match_operand:XF 0 "push_operand" "")
(float_extend:XF (match_operand:DF 1 "fp_register_operand" "")))]
""
- [(set (reg:SI SP_REG) (plus:SI (reg:SI SP_REG) (match_dup 2)))
- (set (mem:DF (reg:SI SP_REG)) (float_extend:XF (match_dup 1)))]
- "operands[2] = GEN_INT (TARGET_128BIT_LONG_DOUBLE ? -16 : -12);")
-
-(define_split
- [(set (match_operand:XF 0 "push_operand" "")
- (float_extend:XF (match_operand:DF 1 "fp_register_operand" "")))]
- "TARGET_64BIT"
- [(set (reg:DI SP_REG) (plus:DI (reg:DI SP_REG) (match_dup 2)))
- (set (mem:XF (reg:DI SP_REG)) (float_extend:XF (match_dup 1)))]
+ [(set (reg:P SP_REG) (plus:P (reg:P SP_REG) (match_dup 2)))
+ (set (mem:DF (reg:P SP_REG)) (float_extend:XF (match_dup 1)))]
"operands[2] = GEN_INT (TARGET_128BIT_LONG_DOUBLE ? -16 : -12);")
(define_expand "extendsfdf2"