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author | Richard Biener <rguenther@suse.de> | 2019-05-16 09:12:53 +0000 |
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committer | Richard Biener <rguenth@gcc.gnu.org> | 2019-05-16 09:12:53 +0000 |
commit | 8c3f47feb3d7b69e185cfa4897c717292a886c1c (patch) | |
tree | 63ac8b352dc9a48b851dc86200b0ab3e76623c29 /gcc | |
parent | d695ae2130d1f28c529dc88f40ebeee27df69730 (diff) | |
download | gcc-8c3f47feb3d7b69e185cfa4897c717292a886c1c.zip gcc-8c3f47feb3d7b69e185cfa4897c717292a886c1c.tar.gz gcc-8c3f47feb3d7b69e185cfa4897c717292a886c1c.tar.bz2 |
re PR testsuite/90502 (gcc.dg/tree-ssa/vector-6.c FAILs)
2019-05-16 Richard Biener <rguenther@suse.de>
PR testsuite/90502
* gcc.dg/tree-ssa/vector-6.c: Adjust for half of the
transforms happening earlier now.
From-SVN: r271283
Diffstat (limited to 'gcc')
-rw-r--r-- | gcc/testsuite/ChangeLog | 6 | ||||
-rw-r--r-- | gcc/testsuite/gcc.dg/tree-ssa/vector-6.c | 5 |
2 files changed, 9 insertions, 2 deletions
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 2c5f638..e6ce5a2 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,9 @@ +2019-05-16 Richard Biener <rguenther@suse.de> + + PR testsuite/90502 + * gcc.dg/tree-ssa/vector-6.c: Adjust for half of the + transforms happening earlier now. + 2019-05-16 Iain Sandoe <iain@sandoe.co.uk> * lib/target-supports.exp (check_effective_target_cet): Add the diff --git a/gcc/testsuite/gcc.dg/tree-ssa/vector-6.c b/gcc/testsuite/gcc.dg/tree-ssa/vector-6.c index 785e5df..e0bb196 100644 --- a/gcc/testsuite/gcc.dg/tree-ssa/vector-6.c +++ b/gcc/testsuite/gcc.dg/tree-ssa/vector-6.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O -fdump-tree-ccp1 -Wno-psabi -w" } */ +/* { dg-options "-O -fdump-tree-ssa -fdump-tree-ccp1 -Wno-psabi -w" } */ /* { dg-additional-options "-msse2" { target i?86-*-* x86_64-*-* } } */ /* { dg-additional-options "-maltivec" { target powerpc_altivec_ok } } */ @@ -32,4 +32,5 @@ v4si test4 (v4si v, int i) return v; } -/* { dg-final { scan-tree-dump-times "Now a gimple register: v" 4 "ccp1" { target { { i?86-*-* x86_64-*-* aarch64*-*-* spu*-*-* } || { powerpc_altivec_ok } } } } } */ +/* { dg-final { scan-tree-dump-times "Now a gimple register: v" 2 "ssa" { target { { i?86-*-* x86_64-*-* aarch64*-*-* spu*-*-* } || { powerpc_altivec_ok } } } } } */ +/* { dg-final { scan-tree-dump-times "Now a gimple register: v" 2 "ccp1" { target { { i?86-*-* x86_64-*-* aarch64*-*-* spu*-*-* } || { powerpc_altivec_ok } } } } } */ |