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| author | Prakhar Bahuguna <prakhar.bahuguna@arm.com> | 2017-05-12 14:16:52 +0000 |
|---|---|---|
| committer | Thomas Preud'homme <thopre01@gcc.gnu.org> | 2017-05-12 14:16:52 +0000 |
| commit | 82600dfc0706b072408737916e99d5b879cdba19 (patch) | |
| tree | 919d9c38b12d9076844b6ccb50e9a361caed6318 /gcc | |
| parent | 9206028e8c65941431301ad405d2c87cd3eb2f7f (diff) | |
| download | gcc-82600dfc0706b072408737916e99d5b879cdba19.zip gcc-82600dfc0706b072408737916e99d5b879cdba19.tar.gz gcc-82600dfc0706b072408737916e99d5b879cdba19.tar.bz2 | |
[ARM] Add missing TARGET_32BIT conditional to movsi
2017-05-12 Prakhar Bahuguna <prakhar.bahuguna@arm.com>
gcc/
* config/arm/arm.md (movsi): Add TARGET_32BIT in addition to the
TARGET_HAVE_MOVT conditional.
(movt splitter): Likewise.
From-SVN: r247971
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 6 | ||||
| -rw-r--r-- | gcc/config/arm/arm.md | 4 |
2 files changed, 8 insertions, 2 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 5f5bd2a..aa408f1 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2017-05-12 Prakhar Bahuguna <prakhar.bahuguna@arm.com> + + * config/arm/arm.md (movsi): Add TARGET_32BIT in addition to the + TARGET_HAVE_MOVT conditional. + (movt splitter): Likewise. + 2017-05-12 Richard Biener <rguenther@suse.de> * tree-ssa-sccvn.h (has_VN_INFO): Declare. diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md index 4a2b623..e6e1ac5 100644 --- a/gcc/config/arm/arm.md +++ b/gcc/config/arm/arm.md @@ -5969,7 +5969,7 @@ { rtx base, offset, tmp; - if (TARGET_HAVE_MOVT) + if (TARGET_32BIT || TARGET_HAVE_MOVT) { /* Everything except mem = const or mem = mem can be done easily. */ if (MEM_P (operands[0])) @@ -6093,7 +6093,7 @@ (define_split [(set (match_operand:SI 0 "arm_general_register_operand" "") (match_operand:SI 1 "const_int_operand" ""))] - "TARGET_HAVE_MOVT + "(TARGET_32BIT || TARGET_HAVE_MOVT) && (!(const_ok_for_arm (INTVAL (operands[1])) || const_ok_for_arm (~INTVAL (operands[1]))))" [(clobber (const_int 0))] |