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authorJerome Lambourg <lambourg@adacore.com>2018-05-22 13:26:33 +0000
committerPierre-Marie de Rodat <pmderodat@gcc.gnu.org>2018-05-22 13:26:33 +0000
commit817659c5f32786062f09befbf7132723441556b6 (patch)
tree97cbe1e933bf5ebaf35ed066115384293c9b6cee /gcc
parent529749b9480f8690c8474cd782664a2d38459ad2 (diff)
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[Ada] Fix the signal trampoline on QNX
The trampoline now properly restores the link register as well as the stack pointer. As a minor optimisation, now only callee-saved registers are restored: the scratch registers don't need that. 2018-05-22 Jerome Lambourg <lambourg@adacore.com> gcc/ada/ * sigtramp-qnx.c: Properly restore link register in signal trampoline. From-SVN: r260530
Diffstat (limited to 'gcc')
-rw-r--r--gcc/ada/ChangeLog4
-rw-r--r--gcc/ada/sigtramp-qnx.c29
2 files changed, 13 insertions, 20 deletions
diff --git a/gcc/ada/ChangeLog b/gcc/ada/ChangeLog
index 748e4a4..985f876 100644
--- a/gcc/ada/ChangeLog
+++ b/gcc/ada/ChangeLog
@@ -1,3 +1,7 @@
+2018-05-22 Jerome Lambourg <lambourg@adacore.com>
+
+ * sigtramp-qnx.c: Properly restore link register in signal trampoline.
+
2018-05-22 Hristian Kirtchev <kirtchev@adacore.com>
* exp_aggr.adb (Aggr_Assignment_OK_For_Backend): Strip away any
diff --git a/gcc/ada/sigtramp-qnx.c b/gcc/ada/sigtramp-qnx.c
index 1a9b616..d0968de 100644
--- a/gcc/ada/sigtramp-qnx.c
+++ b/gcc/ada/sigtramp-qnx.c
@@ -170,33 +170,20 @@ TCR("ret")
#define REG_OFFSET_GR(n) (n * 8)
#define REGNO_GR(n) n
-/* point to the ELR value of the mcontext registers list */
+/* ELR value offset withing the mcontext registers list */
#define REG_OFFSET_ELR (32 * 8)
-#define REGNO_PC 30
+/* The register used to hold the PC value to restore. We need a scratch
+ register. */
+#define REGNO_PC 9
#define CFI_DEF_CFA \
TCR(".cfi_def_cfa " S(CFA_REG) ", 0")
+/* This restores the callee-saved registers, the FP, the LR, and the SP.
+ A scratch register is used as return column to indicate the new value
+ for PC */
#define CFI_COMMON_REGS \
CR("# CFI for common registers\n") \
- TCR(COMMON_CFI(GR(0))) \
- TCR(COMMON_CFI(GR(1))) \
- TCR(COMMON_CFI(GR(2))) \
- TCR(COMMON_CFI(GR(3))) \
- TCR(COMMON_CFI(GR(4))) \
- TCR(COMMON_CFI(GR(5))) \
- TCR(COMMON_CFI(GR(6))) \
- TCR(COMMON_CFI(GR(7))) \
- TCR(COMMON_CFI(GR(8))) \
- TCR(COMMON_CFI(GR(9))) \
- TCR(COMMON_CFI(GR(10))) \
- TCR(COMMON_CFI(GR(11))) \
- TCR(COMMON_CFI(GR(12))) \
- TCR(COMMON_CFI(GR(13))) \
- TCR(COMMON_CFI(GR(14))) \
- TCR(COMMON_CFI(GR(15))) \
- TCR(COMMON_CFI(GR(16))) \
- TCR(COMMON_CFI(GR(17))) \
TCR(COMMON_CFI(GR(18))) \
TCR(COMMON_CFI(GR(19))) \
TCR(COMMON_CFI(GR(20))) \
@@ -209,6 +196,8 @@ TCR("ret")
TCR(COMMON_CFI(GR(27))) \
TCR(COMMON_CFI(GR(28))) \
TCR(COMMON_CFI(GR(29))) \
+ TCR(COMMON_CFI(GR(30))) \
+ TCR(COMMON_CFI(GR(31))) \
TCR(".cfi_offset " S(REGNO_PC) "," S(REG_OFFSET_ELR)) \
TCR(".cfi_return_column " S(REGNO_PC))