i386.md (*movti_internal_rex64): Add (o,e) alternative.

	* config/i386/i386.md (*movti_internal_rex64): Add (o,e) alternative.
	(*movtf_internal_rex64): Add (!o,C) alternative
	(*movxf_internal_rex64): Ditto.
	(*movdf_internal_rex64): Add (?r,C) and (?m,C) alternatives.

From-SVN: r195446

2 files changed, 35 insertions, 23 deletions

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 675138f..54a89af 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,10 @@
+2012-01-24  Uros Bizjak  <ubizjak@gmail.com>
+
+	* config/i386/i386.md (*movti_internal_rex64): Add (o,e) alternative.
+	(*movtf_internal_rex64): Add (!o,C) alternative
+	(*movxf_internal_rex64): Ditto.
+	(*movdf_internal_rex64): Add (?r,C) and (?m,C) alternatives.
+
 2013-01-24  Shenghou Ma  <minux.ma@gmail.com>
 
 	* doc/invoke.texi: fix typo.
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index f09f769..9d0a499 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -1757,8 +1757,8 @@
 	      (const_string "OI")))])
 
 (define_insn "*movti_internal_rex64"
-  [(set (match_operand:TI 0 "nonimmediate_operand" "=!r ,o,x,x ,m")
-	(match_operand:TI 1 "general_operand"      "riFo,r,C,xm,x"))]
+  [(set (match_operand:TI 0 "nonimmediate_operand" "=!r ,o ,x,x ,m")
+	(match_operand:TI 1 "general_operand"      "riFo,re,C,xm,x"))]
   "TARGET_64BIT && !(MEM_P (operands[0]) && MEM_P (operands[1]))"
 {
   switch (which_alternative)
@@ -2106,7 +2106,7 @@
   [(set (match_operand:SI 0 "nonimmediate_operand"
 			"=r,m ,*y,*y,?rm,?*y,*x,*x,?r ,m ,?*Yi,*x")
 	(match_operand:SI 1 "general_operand"
-			"g ,re,C ,*y,*y ,rm ,C ,*x,*Yi,*x,r   ,m "))]
+			"g ,re,C ,*y,*y ,rm ,C ,*x,*Yi,*x,r   ,m"))]
   "!(MEM_P (operands[0]) && MEM_P (operands[1]))"
 {
   switch (get_attr_type (insn))
@@ -2189,8 +2189,8 @@
 	   (const_string "SI")))])
 
 (define_insn "*movhi_internal"
-  [(set (match_operand:HI 0 "nonimmediate_operand" "=r,r,r,m")
-	(match_operand:HI 1 "general_operand" "r,rn,rm,rn"))]
+  [(set (match_operand:HI 0 "nonimmediate_operand" "=r,r ,r ,m")
+	(match_operand:HI 1 "general_operand"	   "r ,rn,rm,rn"))]
   "!(MEM_P (operands[0]) && MEM_P (operands[1]))"
 {
   switch (get_attr_type (insn))
@@ -2246,7 +2246,7 @@
 ;; partial register stall can be caused there.  Then we use movzx.
 (define_insn "*movqi_internal"
   [(set (match_operand:QI 0 "nonimmediate_operand" "=q,q ,q ,r,r ,?r,m")
-	(match_operand:QI 1 "general_operand"      " q,qn,qm,q,rn,qm,qn"))]
+	(match_operand:QI 1 "general_operand"      "q ,qn,qm,q,rn,qm,qn"))]
   "!(MEM_P (operands[0]) && MEM_P (operands[1]))"
 {
   switch (get_attr_type (insn))
@@ -2747,7 +2747,7 @@
 
 (define_insn "*movtf_internal_rex64"
   [(set (match_operand:TF 0 "nonimmediate_operand" "=x,x ,m,?*r ,!o")
-	(match_operand:TF 1 "general_operand"	   "C ,xm,x,*roF,*r"))]
+	(match_operand:TF 1 "general_operand"	   "C ,xm,x,*roF,*rC"))]
   "TARGET_64BIT && !(MEM_P (operands[0]) && MEM_P (operands[1]))
    && (!can_create_pseudo_p ()
        || (ix86_cmodel == CM_MEDIUM || ix86_cmodel == CM_LARGE)
@@ -2867,7 +2867,7 @@
 
 (define_insn "*movxf_internal_rex64"
   [(set (match_operand:XF 0 "nonimmediate_operand" "=f,m,f,?Yx*r ,!o")
-	(match_operand:XF 1 "general_operand"	   "fm,f,G,Yx*roF,Yx*r"))]
+	(match_operand:XF 1 "general_operand"	   "fm,f,G,Yx*roF,Yx*rC"))]
   "TARGET_64BIT && !(MEM_P (operands[0]) && MEM_P (operands[1]))
    && (!can_create_pseudo_p ()
        || (ix86_cmodel == CM_MEDIUM || ix86_cmodel == CM_LARGE)
@@ -2901,7 +2901,7 @@
 ;; Possible store forwarding (partial memory) stall in alternative 4.
 (define_insn "*movxf_internal"
   [(set (match_operand:XF 0 "nonimmediate_operand" "=f,m,f,?Yx*r ,!o")
-	(match_operand:XF 1 "general_operand"	   "fm,f,G,Yx*roF,FYx*r"))]
+	(match_operand:XF 1 "general_operand"	   "fm,f,G,Yx*roF,Yx*rF"))]
   "!TARGET_64BIT && !(MEM_P (operands[0]) && MEM_P (operands[1]))
    && (!can_create_pseudo_p ()
        || (ix86_cmodel == CM_MEDIUM || ix86_cmodel == CM_LARGE)
@@ -2934,9 +2934,9 @@
 
 (define_insn "*movdf_internal_rex64"
   [(set (match_operand:DF 0 "nonimmediate_operand"
-		"=Yf*f,m   ,Yf*f,?r ,?m,?r,x,x,x,m,Yi,r ")
+		"=Yf*f,m   ,Yf*f,?r,?m,?r,?r,x,x,x,m,Yi,r")
 	(match_operand:DF 1 "general_operand"
-		"Yf*fm,Yf*f,G   ,rmC,rC,F ,C,x,m,x,r ,Yi"))]
+		"Yf*fm,Yf*f,G   ,rm,rC,C ,F ,C,x,m,x,r ,Yi"))]
   "TARGET_64BIT && !(MEM_P (operands[0]) && MEM_P (operands[1]))
    && (!can_create_pseudo_p ()
        || (ix86_cmodel == CM_MEDIUM || ix86_cmodel == CM_LARGE)
@@ -2962,14 +2962,17 @@
       return "mov{q}\t{%1, %0|%0, %1}";
 
     case 5:
-      return "movabs{q}\t{%1, %0|%0, %1}";
+      return "mov{l}\t{%1, %k0|%k0, %1}";
 
     case 6:
-      return standard_sse_constant_opcode (insn, operands[1]);
+      return "movabs{q}\t{%1, %0|%0, %1}";
 
     case 7:
+      return standard_sse_constant_opcode (insn, operands[1]);
+
     case 8:
     case 9:
+    case 10:
       switch (get_attr_mode (insn))
 	{
 	case MODE_V2DF:
@@ -2991,8 +2994,8 @@
 	  gcc_unreachable ();
 	}
 
-    case 10:
     case 11:
+    case 12:
       /* Handle broken assemblers that require movd instead of movq.  */
       return "%vmovd\t{%1, %0|%0, %1}";
 
@@ -3003,24 +3006,24 @@
   [(set (attr "type")
 	(cond [(eq_attr "alternative" "0,1,2")
 		 (const_string "fmov")
-	       (eq_attr "alternative" "3,4,5")
+	       (eq_attr "alternative" "3,4,5,6")
 		 (const_string "imov")
-	       (eq_attr "alternative" "6")
+	       (eq_attr "alternative" "7")
 		 (const_string "sselog1")
 	      ]
 	      (const_string "ssemov")))
    (set (attr "modrm")
      (if_then_else
-       (and (eq_attr "alternative" "5") (eq_attr "type" "imov"))
+       (and (eq_attr "alternative" "6") (eq_attr "type" "imov"))
 	 (const_string "0")
 	 (const_string "*")))
    (set (attr "length_immediate")
      (if_then_else
-       (and (eq_attr "alternative" "5") (eq_attr "type" "imov"))
+       (and (eq_attr "alternative" "6") (eq_attr "type" "imov"))
 	 (const_string "8")
 	 (const_string "*")))
    (set (attr "prefix")
-     (if_then_else (eq_attr "alternative" "0,1,2,3,4,5")
+     (if_then_else (eq_attr "alternative" "0,1,2,3,4,5,6")
        (const_string "orig")
        (const_string "maybe_vex")))
    (set (attr "prefix_data16")
@@ -3030,11 +3033,13 @@
    (set (attr "mode")
         (cond [(eq_attr "alternative" "0,1,2")
 		 (const_string "DF")
-	       (eq_attr "alternative" "3,4,5,10,11")
+	       (eq_attr "alternative" "3,4,6,11,12")
 		 (const_string "DI")
+	       (eq_attr "alternative" "5")
+		 (const_string "SI")
 
 	       /* xorps is one byte shorter for !TARGET_AVX.  */
-	       (eq_attr "alternative" "6")
+	       (eq_attr "alternative" "7")
 		 (cond [(match_test "TARGET_AVX")
 			  (const_string "V2DF")
 			(match_test "optimize_function_for_size_p (cfun)")
@@ -3049,7 +3054,7 @@
 		  chains, otherwise use short move to avoid extra work.
 
 		  movaps encodes one byte shorter for !TARGET_AVX.  */
-	       (eq_attr "alternative" "7")
+	       (eq_attr "alternative" "8")
 		 (cond [(match_test "TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL")
 			  (const_string "V4SF")
 			(match_test "TARGET_SSE_PARTIAL_REG_DEPENDENCY")
@@ -3063,7 +3068,7 @@
 	       /* For architectures resolving dependencies on register
 		  parts we may avoid extra work to zero out upper part
 		  of register.  */
-	       (eq_attr "alternative" "8")
+	       (eq_attr "alternative" "9")
 		 (if_then_else
 		   (match_test "TARGET_SSE_SPLIT_REGS")
 		   (const_string "V1DF")