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| author | Chenghua Xu <paul.hua.gm@gmail.com> | 2018-06-13 06:50:12 +0000 |
|---|---|---|
| committer | Chenghua Xu <paulhua@gcc.gnu.org> | 2018-06-13 06:50:12 +0000 |
| commit | 7a723d822a17e697f3a02abf40fb2d3415302985 (patch) | |
| tree | 07df93346a30ff27cbcd9a92503ffa1e9671c0a9 /gcc | |
| parent | cde650fe2bd119dc2e20df41893907b329b5a6f2 (diff) | |
| download | gcc-7a723d822a17e697f3a02abf40fb2d3415302985.zip gcc-7a723d822a17e697f3a02abf40fb2d3415302985.tar.gz gcc-7a723d822a17e697f3a02abf40fb2d3415302985.tar.bz2 | |
re PR tree-optimization/86076 (ICE: verify_gimple failed (error: location references block not in block tree))
2018-06-13 Chenghua Xu <paul.hua.gm@gmail.com>
PR target/86076
* config/mips/loongson.md (vec_setv4hi): Gen_lowpart for
operands[2] instead of operands[1].
From-SVN: r261538
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 7 | ||||
| -rw-r--r-- | gcc/config/mips/loongson.md | 4 |
2 files changed, 9 insertions, 2 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 0cb7cfd..93e02df 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2018-06-13 Chenghua Xu <paul.hua.gm@gmail.com> + + PR target/86076 + * config/mips/loongson.md (vec_setv4hi): Gen_lowpart for + operands[2] instead of operands[1]. + + 2018-06-12 Richard Sandiford <richard.sandiford@linaro.org> * lra-constraints.c (simplify_operand_subreg): In the paradoxical diff --git a/gcc/config/mips/loongson.md b/gcc/config/mips/loongson.md index 38912ac..14794d3 100644 --- a/gcc/config/mips/loongson.md +++ b/gcc/config/mips/loongson.md @@ -381,8 +381,8 @@ "TARGET_HARD_FLOAT && TARGET_LOONGSON_VECTORS" { rtx ext = gen_reg_rtx (SImode); - emit_move_insn (ext, gen_lowpart (SImode, operands[1])); - operands[1] = ext; + emit_move_insn (ext, gen_lowpart (SImode, operands[2])); + operands[2] = ext; }) ;; Multiply and add packed integers. |