Merge push patterns for memory/nonmemory

From-SVN: r8048

1 files changed, 120 insertions, 128 deletions

diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index 79d35d0..986f7f3 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -1064,15 +1064,15 @@
   ""
   "
 {
-  /* Special case memory->memory moves */
+  /* Special case memory->memory moves and pushes */
   if (TARGET_MOVE
       && (reload_in_progress | reload_completed) == 0
       && GET_CODE (operands[0]) == MEM
-      && GET_CODE (operands[1]) == MEM)
+      && (GET_CODE (operands[1]) == MEM || push_operand (operands[0], SFmode)))
     {
       rtx (*genfunc) PROTO((rtx, rtx));
       if (push_operand (operands[0], SFmode))
-	genfunc = (TARGET_386) ? gen_movsf_push386 : gen_movsf_push486_mem;
+	genfunc = (TARGET_386) ? gen_movsf_push386 : gen_movsf_push486;
       else
 	genfunc = gen_movsf_mem;
 
@@ -1110,8 +1110,9 @@
 }")
 
 (define_insn "movsf_push486"
-  [(set (match_operand:SF 0 "push_operand" "=<,<")
-	(match_operand:SF 1 "nonmemory_operand" "rF,f"))]
+  [(set (match_operand:SF 0 "push_operand" "=<,<,<")
+	(match_operand:SF 1 "general_operand" "rF,f,m"))
+   (clobber (match_scratch:SI 2 "=X,X,r"))]
   "!TARGET_386"
   "*
 {
@@ -1134,18 +1135,15 @@
         output_asm_insn (AS1 (fst%S0,%0), xops);
       RET;
     }
-  return AS1 (push%L1,%1);
-}")
 
-(define_insn "movsf_push486_mem"
-  [(set (match_operand:SF 0 "push_operand" "=<")
-	(match_operand:SF 1 "memory_operand" "m"))
-   (clobber (match_scratch:SI 2 "=r"))]
-  "!TARGET_386"
-  "*
-{
-  output_asm_insn (AS2 (mov%L2,%1,%2), operands);
-  return AS1 (push%L2,%2);
+  else if (GET_CODE (operands[1]) != MEM)
+    return AS1 (push%L1,%1);
+
+  else
+    {
+      output_asm_insn (AS2 (mov%L2,%1,%2), operands);
+      return AS1 (push%L2,%2);
+    }
 }")
 
 ;; Special memory<->memory pattern that combine will recreate from the
@@ -1237,15 +1235,15 @@
   ""
   "
 {
-  /* Special case memory->memory moves */
+  /* Special case memory->memory moves and pushes */
   if (TARGET_MOVE
       && (reload_in_progress | reload_completed) == 0
       && GET_CODE (operands[0]) == MEM
-      && GET_CODE (operands[1]) == MEM)
+      && (GET_CODE (operands[1]) == MEM || push_operand (operands[0], DFmode)))
     {
       rtx (*genfunc) PROTO((rtx, rtx));
       if (push_operand (operands[0], DFmode))
-	genfunc = (TARGET_386) ? gen_movdf_push386 : gen_movdf_push486_mem;
+	genfunc = (TARGET_386) ? gen_movdf_push386 : gen_movdf_push486;
       else
 	genfunc = gen_movdf_mem;
 
@@ -1282,8 +1280,10 @@
 }")
 
 (define_insn "movdf_push486"
-  [(set (match_operand:DF 0 "push_operand" "=<,<")
-	(match_operand:DF 1 "nonmemory_operand" "rF,f"))]
+  [(set (match_operand:DF 0 "push_operand" "=<,<,<,<")
+	(match_operand:DF 1 "general_operand" "rF,f,o,o"))
+   (clobber (match_scratch:SI 2 "=X,X,&r,&r"))
+   (clobber (match_scratch:SI 3 "=X,X,&r,X"))]
   "!TARGET_386"
   "*
 {
@@ -1304,42 +1304,37 @@
 
       RET;
     }
-  else
-    return output_move_double (operands);
-}")
-
-(define_insn "movdf_push486_mem"
-  [(set (match_operand:DF 0 "push_operand" "=<,<")
-	(match_operand:DF 1 "general_operand" "o,o"))
-   (clobber (match_scratch:SI 2 "=&r,&r"))
-   (clobber (match_scratch:SI 3 "=&r,X"))]
-  "!TARGET_386"
-  "*
-{
-  rtx low[1], high[1], xop[4];
 
-  split_di (&operands[1], 1, low, high);
-  xop[0] = operands[2];
-  xop[1] = operands[3];
-  xop[2] = high[0];
-  xop[3] = low[0];
+  else if (GET_CODE (operands[1]) != MEM)
+    return output_move_double (operands);
 
-  if (GET_CODE (operands[3]) == REG)
-    {				/* 2 scratch registers available */
-      output_asm_insn (AS2 (mov%L0,%2,%0), xop);
-      output_asm_insn (AS2 (mov%L0,%3,%1), xop);
-      output_asm_insn (AS1 (push%L0,%0), xop);
-      output_asm_insn (AS1 (push%L0,%1), xop);
-    }
   else
-    {				/* 1 scratch register */
-      output_asm_insn (AS2 (mov%L0,%2,%0), xop);
-      output_asm_insn (AS1 (push%L0,%0), xop);
-      output_asm_insn (AS2 (mov%L0,%3,%0), xop);
-      output_asm_insn (AS1 (push%L0,%0), xop);
-    }
+    {
+      rtx low[1], high[1], xop[4];
+
+      split_di (&operands[1], 1, low, high);
+      xop[0] = operands[2];
+      xop[1] = operands[3];
+      xop[2] = high[0];
+      xop[3] = low[0];
+
+      if (GET_CODE (operands[3]) == REG)
+	{			/* 2 scratch registers available */
+	  output_asm_insn (AS2 (mov%L0,%2,%0), xop);
+	  output_asm_insn (AS2 (mov%L0,%3,%1), xop);
+	  output_asm_insn (AS1 (push%L0,%0), xop);
+	  output_asm_insn (AS1 (push%L0,%1), xop);
+	}
+      else
+	{			/* 1 scratch register */
+	  output_asm_insn (AS2 (mov%L0,%2,%0), xop);
+	  output_asm_insn (AS1 (push%L0,%0), xop);
+	  output_asm_insn (AS2 (mov%L0,%3,%0), xop);
+	  output_asm_insn (AS1 (push%L0,%0), xop);
+	}
 
-  RET;
+      RET;
+    }
 }")
 
 (define_insn "movdf_mem"
@@ -1453,15 +1448,15 @@
   ""
   "
 {
-  /* Special case memory->memory moves */
+  /* Special case memory->memory moves and pushes */
   if (TARGET_MOVE
       && (reload_in_progress | reload_completed) == 0
       && GET_CODE (operands[0]) == MEM
-      && GET_CODE (operands[1]) == MEM)
+      && (GET_CODE (operands[1]) == MEM || push_operand (operands[0], XFmode)))
     {
       rtx (*genfunc) PROTO((rtx, rtx));
       if (push_operand (operands[0], XFmode))
-	genfunc = (TARGET_386) ? gen_movxf_push386 : gen_movxf_push486_mem;
+	genfunc = (TARGET_386) ? gen_movxf_push386 : gen_movxf_push486;
       else
 	genfunc = gen_movxf_mem;
 
@@ -1496,8 +1491,10 @@
  }")
 
 (define_insn "movxf_push486"
-  [(set (match_operand:XF 0 "push_operand" "=<,<")
- 	(match_operand:XF 1 "nonmemory_operand" "rF,f"))]
+  [(set (match_operand:XF 0 "push_operand" "=<,<,<,<")
+ 	(match_operand:XF 1 "general_operand" "rF,f,o,o"))
+   (clobber (match_scratch:SI 2 "=X,X,&r,&r"))
+   (clobber (match_scratch:SI 3 "=X,X,&r,X"))]
   "!TARGET_386"
   "*
 {
@@ -1516,46 +1513,41 @@
 
       RET;
     }
-  else
-    return output_move_double (operands);
- }")
 
-(define_insn "movxf_push486_mem"
-  [(set (match_operand:XF 0 "push_operand" "=<,<")
-	(match_operand:XF 1 "memory_operand" "o,o"))
-   (clobber (match_scratch:SI 2 "=&r,&r"))
-   (clobber (match_scratch:SI 3 "=&r,X"))]
-  "!TARGET_386"
-  "*
-{
-  rtx xop[5];
-
-  xop[0] = operands[2];
-  xop[1] = operands[3];
-  xop[2] = adj_offsettable_operand (operands[1], 8);
-  xop[3] = adj_offsettable_operand (operands[1], 4);
-  xop[4] = operands[1];
+  else if (GET_CODE (operands[1]) != MEM)
+    return output_move_double (operands);
 
-  if (GET_CODE (operands[3]) == REG)
-    {				/* 2 scratch registers available */
-      output_asm_insn (AS2 (mov%L0,%2,%0), xop);
-      output_asm_insn (AS2 (mov%L0,%3,%1), xop);
-      output_asm_insn (AS1 (push%L0,%0), xop);
-      output_asm_insn (AS1 (push%L0,%1), xop);
-      output_asm_insn (AS2 (mov%L0,%4,%0), xop);
-      output_asm_insn (AS1 (push%L0,%0), xop);
-    }
   else
-    {				/* 1 scratch register */
-      output_asm_insn (AS2 (mov%L0,%2,%0), xop);
-      output_asm_insn (AS1 (push%L0,%0), xop);
-      output_asm_insn (AS2 (mov%L0,%3,%0), xop);
-      output_asm_insn (AS1 (push%L0,%0), xop);
-      output_asm_insn (AS2 (mov%L0,%4,%0), xop);
-      output_asm_insn (AS1 (push%L0,%0), xop);
-    }
+    {
+      rtx xop[5];
+
+      xop[0] = operands[2];
+      xop[1] = operands[3];
+      xop[2] = adj_offsettable_operand (operands[1], 8);
+      xop[3] = adj_offsettable_operand (operands[1], 4);
+      xop[4] = operands[1];
+
+      if (GET_CODE (operands[3]) == REG)
+	{			/* 2 scratch registers available */
+	  output_asm_insn (AS2 (mov%L0,%2,%0), xop);
+	  output_asm_insn (AS2 (mov%L0,%3,%1), xop);
+	  output_asm_insn (AS1 (push%L0,%0), xop);
+	  output_asm_insn (AS1 (push%L0,%1), xop);
+	  output_asm_insn (AS2 (mov%L0,%4,%0), xop);
+	  output_asm_insn (AS1 (push%L0,%0), xop);
+	}
+      else
+	{			/* 1 scratch register */
+	  output_asm_insn (AS2 (mov%L0,%2,%0), xop);
+	  output_asm_insn (AS1 (push%L0,%0), xop);
+	  output_asm_insn (AS2 (mov%L0,%3,%0), xop);
+	  output_asm_insn (AS1 (push%L0,%0), xop);
+	  output_asm_insn (AS2 (mov%L0,%4,%0), xop);
+	  output_asm_insn (AS1 (push%L0,%0), xop);
+	}
 
-  RET;
+      RET;
+    }
 }")
 
 (define_insn "movxf_mem"
@@ -1675,15 +1667,15 @@
   ""
   "
 {
-  /* Special case memory->memory moves */
+  /* Special case memory->memory moves and pushes */
   if (TARGET_MOVE
       && (reload_in_progress | reload_completed) == 0
       && GET_CODE (operands[0]) == MEM
-      && GET_CODE (operands[1]) == MEM)
+      && (GET_CODE (operands[1]) == MEM || push_operand (operands[0], DImode)))
     {
       rtx (*genfunc) PROTO((rtx, rtx));
       if (push_operand (operands[0], DImode))
-	genfunc = (TARGET_386) ? gen_movdi_push386 : gen_movdi_push486_mem;
+	genfunc = (TARGET_386) ? gen_movdi_push386 : gen_movdi_push486;
       else
 	genfunc = gen_movdi_mem;
 
@@ -1699,43 +1691,43 @@
   "* return output_move_double (operands);")
 
 (define_insn "movdi_push486"
-  [(set (match_operand:DI 0 "push_operand" "=<")
-	(match_operand:DI 1 "nonmemory_operand" "riF"))]
-  "!TARGET_386"
-  "* return output_move_double (operands);")
-
-(define_insn "movdi_push486_mem"
-  [(set (match_operand:DI 0 "push_operand" "=<,<")
-	(match_operand:DI 1 "memory_operand" "o,o"))
-   (clobber (match_scratch:SI 2 "=&r,=&r"))
-   (clobber (match_scratch:SI 3 "=&r,X"))]
+  [(set (match_operand:DI 0 "push_operand" "=<,<,<")
+	(match_operand:DI 1 "general_operand" "riF,o,o"))
+   (clobber (match_scratch:SI 2 "=X,&r,=&r"))
+   (clobber (match_scratch:SI 3 "=X,&r,X"))]
   "!TARGET_386"
   "*
 {
-  rtx low[1], high[1], xop[4];
-
-  split_di (&operands[1], 1, low, high);
-  xop[0] = operands[2];
-  xop[1] = operands[3];
-  xop[2] = high[0];
-  xop[3] = low[0];
+  if (GET_CODE (operands[1]) != MEM)
+    return output_move_double (operands);
 
-  if (GET_CODE (operands[3]) == REG)
-    {				/* 2 scratch registers available */
-      output_asm_insn (AS2 (mov%L0,%2,%0), xop);
-      output_asm_insn (AS2 (mov%L0,%3,%1), xop);
-      output_asm_insn (AS1 (push%L0,%0), xop);
-      output_asm_insn (AS1 (push%L0,%1), xop);
-    }
   else
-    {				/* 1 scratch register */
-      output_asm_insn (AS2 (mov%L0,%2,%0), xop);
-      output_asm_insn (AS1 (push%L0,%0), xop);
-      output_asm_insn (AS2 (mov%L0,%3,%0), xop);
-      output_asm_insn (AS1 (push%L0,%0), xop);
-    }
+    {
+      rtx low[1], high[1], xop[4];
+
+      split_di (&operands[1], 1, low, high);
+      xop[0] = operands[2];
+      xop[1] = operands[3];
+      xop[2] = high[0];
+      xop[3] = low[0];
+
+      if (GET_CODE (operands[3]) == REG)
+	{			/* 2 scratch registers available */
+	  output_asm_insn (AS2 (mov%L0,%2,%0), xop);
+	  output_asm_insn (AS2 (mov%L0,%3,%1), xop);
+	  output_asm_insn (AS1 (push%L0,%0), xop);
+	  output_asm_insn (AS1 (push%L0,%1), xop);
+	}
+      else
+	{			/* 1 scratch register */
+	  output_asm_insn (AS2 (mov%L0,%2,%0), xop);
+	  output_asm_insn (AS1 (push%L0,%0), xop);
+	  output_asm_insn (AS2 (mov%L0,%3,%0), xop);
+	  output_asm_insn (AS1 (push%L0,%0), xop);
+	}
 
-  RET;
+      RET;
+    }
 }")
 
 (define_insn "movdi_mem"