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| author | Richard Earnshaw <rearnsha@arm.com> | 2004-05-20 14:59:43 +0000 |
|---|---|---|
| committer | Richard Earnshaw <rearnsha@gcc.gnu.org> | 2004-05-20 14:59:43 +0000 |
| commit | 692603556b895a3a337b5a82e0012f69e8707896 (patch) | |
| tree | 60d0d4c30b00287c96965379c6a4daeb66a4422d /gcc | |
| parent | 1ffae6283039532568e776e7a55d07b05c7aa62c (diff) | |
| download | gcc-692603556b895a3a337b5a82e0012f69e8707896.zip gcc-692603556b895a3a337b5a82e0012f69e8707896.tar.gz gcc-692603556b895a3a337b5a82e0012f69e8707896.tar.bz2 | |
arm.md (ite_ne_zeroextractsi, [...]): Ensure we don't earlyclobber operands used in the second insn.
* arm.md (ite_ne_zeroextractsi, ite_ne_zeroextractsi_shifted): Ensure
we don't earlyclobber operands used in the second insn.
From-SVN: r82057
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/config/arm/arm.md | 10 |
2 files changed, 11 insertions, 4 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 09873bc..fb5adc9 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2004-05-20 Richard Earnshaw <rearnsha@arm.com> + + * arm.md (ite_ne_zeroextractsi, ite_ne_zeroextractsi_shifted): Ensure + we don't earlyclobber operands used in the second insn. + 2004-05-20 Steven Bosscher <stevenb@suse.de> * tree-mudflap.c: Formatting fixes. diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md index 0271785..82f1701 100644 --- a/gcc/config/arm/arm.md +++ b/gcc/config/arm/arm.md @@ -1719,13 +1719,15 @@ && (INTVAL (operands[3]) >= 0 && INTVAL (operands[3]) < 32 && INTVAL (operands[2]) > 0 && INTVAL (operands[2]) + (INTVAL (operands[3]) & 1) <= 8 - && INTVAL (operands[2]) + INTVAL (operands[3]) <= 32)" + && INTVAL (operands[2]) + INTVAL (operands[3]) <= 32) + && !reg_overlap_mentioned_p (operands[0], operands[4])" "#" "TARGET_ARM && (INTVAL (operands[3]) >= 0 && INTVAL (operands[3]) < 32 && INTVAL (operands[2]) > 0 && INTVAL (operands[2]) + (INTVAL (operands[3]) & 1) <= 8 - && INTVAL (operands[2]) + INTVAL (operands[3]) <= 32)" + && INTVAL (operands[2]) + INTVAL (operands[3]) <= 32) + && !reg_overlap_mentioned_p (operands[0], operands[4])" [(parallel [(set (reg:CC_NOOV CC_REGNUM) (compare:CC_NOOV (and:SI (match_dup 1) (match_dup 2)) (const_int 0))) @@ -1751,9 +1753,9 @@ (match_operand:SI 3 "arm_not_operand" "rIK") (const_int 0))) (clobber (reg:CC CC_REGNUM))] - "TARGET_ARM" + "TARGET_ARM && !reg_overlap_mentioned_p (operands[0], operands[3])" "#" - "TARGET_ARM" + "TARGET_ARM && !reg_overlap_mentioned_p (operands[0], operands[3])" [(parallel [(set (reg:CC_NOOV CC_REGNUM) (compare:CC_NOOV (ashift:SI (match_dup 1) (match_dup 2)) (const_int 0))) |