diff options
| author | Richard Sandiford <rdsandiford@googlemail.com> | 2012-01-02 11:33:35 +0000 |
|---|---|---|
| committer | Richard Sandiford <rsandifo@gcc.gnu.org> | 2012-01-02 11:33:35 +0000 |
| commit | 5f595f167555e127f24d3defedf431b06209bdfc (patch) | |
| tree | c83fe8f341cefdc2d000061306d25f554abbdb71 /gcc | |
| parent | e3763a5b447bedc84e38fe48d84189824928e9f1 (diff) | |
| download | gcc-5f595f167555e127f24d3defedf431b06209bdfc.zip gcc-5f595f167555e127f24d3defedf431b06209bdfc.tar.gz gcc-5f595f167555e127f24d3defedf431b06209bdfc.tar.bz2 | |
re PR target/51729 (dspr2-MULT.c and dspr2-MULTU.c fail for MIPS)
gcc/testsuite/
PR target/51729
* gcc.target/mips/dspr2-MULT.c: Remove -ffixed-hi -ffixed-lo.
XFAIL.
* gcc.target/mips/dspr2-MULTU.c: Likewise.
From-SVN: r182793
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/testsuite/ChangeLog | 7 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/mips/dspr2-MULT.c | 7 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/mips/dspr2-MULTU.c | 7 |
3 files changed, 15 insertions, 6 deletions
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 12bb659..fe6a600 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,5 +1,12 @@ 2012-01-02 Richard Sandiford <rdsandiford@googlemail.com> + PR target/51729 + * gcc.target/mips/dspr2-MULT.c: Remove -ffixed-hi -ffixed-lo. + XFAIL. + * gcc.target/mips/dspr2-MULTU.c: Likewise. + +2012-01-02 Richard Sandiford <rdsandiford@googlemail.com> + * gcc.dg/pr46309.c: Add -mtune=octeon2 for MIPS. 2012-01-02 Richard Sandiford <rdsandiford@googlemail.com> diff --git a/gcc/testsuite/gcc.target/mips/dspr2-MULT.c b/gcc/testsuite/gcc.target/mips/dspr2-MULT.c index 8b815e5..c685974 100644 --- a/gcc/testsuite/gcc.target/mips/dspr2-MULT.c +++ b/gcc/testsuite/gcc.target/mips/dspr2-MULT.c @@ -1,11 +1,12 @@ /* Test MIPS32 DSP REV 2 MULT instruction. Tune for a CPU that has pipelined mult. */ /* { dg-do compile } */ -/* { dg-options "-mgp32 -mdspr2 -O2 -ffixed-hi -ffixed-lo -mtune=74kc" } */ +/* { dg-options "-mgp32 -mdspr2 -O2 -mtune=74kc" } */ +/* See PR target/51729 for the reason behind the XFAILs. */ /* { dg-final { scan-assembler "\tmult\t" } } */ -/* { dg-final { scan-assembler "ac1" } } */ -/* { dg-final { scan-assembler "ac2" } } */ +/* { dg-final { scan-assembler "ac1" { xfail *-*-* } } } */ +/* { dg-final { scan-assembler "ac2" { xfail *-*-* } } } */ typedef long long a64; diff --git a/gcc/testsuite/gcc.target/mips/dspr2-MULTU.c b/gcc/testsuite/gcc.target/mips/dspr2-MULTU.c index c457d24..7f04315 100644 --- a/gcc/testsuite/gcc.target/mips/dspr2-MULTU.c +++ b/gcc/testsuite/gcc.target/mips/dspr2-MULTU.c @@ -1,11 +1,12 @@ /* Test MIPS32 DSP REV 2 MULTU instruction. Tune for a CPU that has pipelined multu. */ /* { dg-do compile } */ -/* { dg-options "-mgp32 -mdspr2 -O2 -ffixed-hi -ffixed-lo -mtune=74kc" } */ +/* { dg-options "-mgp32 -mdspr2 -O2 -mtune=74kc" } */ +/* See PR target/51729 for the reason behind the XFAILs. */ /* { dg-final { scan-assembler "\tmultu\t" } } */ -/* { dg-final { scan-assembler "ac1" } } */ -/* { dg-final { scan-assembler "ac2" } } */ +/* { dg-final { scan-assembler "ac1" { xfail *-*-* } } } */ +/* { dg-final { scan-assembler "ac2" { xfail *-*-* } } } */ typedef unsigned long long a64; |