diff options
| author | Kirill Yukhin <kirill.yukhin@intel.com> | 2016-05-31 08:05:24 +0000 |
|---|---|---|
| committer | Kirill Yukhin <kyukhin@gcc.gnu.org> | 2016-05-31 08:05:24 +0000 |
| commit | 5b8c120584ea8153ef5c230de9b6a3987f6a04da (patch) | |
| tree | 0359498f63a393b3ef0120a5e83e55721fa1cb49 /gcc | |
| parent | 7a88cc8467b948a302c9faedded8f39d7bd6380a (diff) | |
| download | gcc-5b8c120584ea8153ef5c230de9b6a3987f6a04da.zip gcc-5b8c120584ea8153ef5c230de9b6a3987f6a04da.tar.gz gcc-5b8c120584ea8153ef5c230de9b6a3987f6a04da.tar.bz2 | |
AVX-512. Limit constraint for scalar operand in split to AVX-512VL.
PR target/71346
gcc/
* config/i386/sse.md (define_insn_and_split "*vec_extractv4sf_0"): Use
`Yv' for scalar operand.
testsuite/
* gcc.target/i386/pr71346.c: New test.
From-SVN: r236909
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 6 | ||||
| -rw-r--r-- | gcc/config/i386/sse.md | 2 | ||||
| -rw-r--r-- | gcc/testsuite/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/i386/pr71346.c | 25 |
4 files changed, 37 insertions, 1 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 88fa0e5..587afe0 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2016-05-31 Kirill Yukhin <kirill.yukhin@intel.com> + + PR target/71346 + * config/i386/sse.md (define_insn_and_split "*vec_extractv4sf_0"): Use + `Yv' for scalar operand. + 2016-05-31 Tom de Vries <tom@codesourcery.com> PR tree-optimization/69068 diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index b348f2d..1267897 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -6837,7 +6837,7 @@ "operands[1] = gen_lowpart (SFmode, operands[1]);") (define_insn_and_split "*sse4_1_extractps" - [(set (match_operand:SF 0 "nonimmediate_operand" "=rm,rm,rm,v,v") + [(set (match_operand:SF 0 "nonimmediate_operand" "=rm,rm,rm,Yv,Yv") (vec_select:SF (match_operand:V4SF 1 "register_operand" "Yr,*x,v,0,v") (parallel [(match_operand:SI 2 "const_0_to_3_operand" "n,n,n,n,n")])))] diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 0ae4c9b..05eb1e8 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2016-05-31 Kirill Yukhin <kirill.yukhin@intel.com> + + PR target/71346 + * gcc.target/i386/pr71346.c: New test. + 2016-05-31 Tom de Vries <tom@codesourcery.com> PR tree-optimization/69068 diff --git a/gcc/testsuite/gcc.target/i386/pr71346.c b/gcc/testsuite/gcc.target/i386/pr71346.c new file mode 100644 index 0000000..0a15869 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr71346.c @@ -0,0 +1,25 @@ +/* PR target/71346 */ +/* { dg-do compile { target { ! ia32 } } } */ +/* { dg-options "-O2 -ftree-vectorize -ffast-math -march=knl" } */ + +typedef int rvec[3]; +int a; +float b, c, d, g; +rvec *e, *f; +void fn2(float h, float g); + +void +fn1() +{ + float h; + for (; a; a++) { + h += e[a][0] * f[a][0]; + b += e[a][0] * f[a][1]; + c += e[a][2] * f[a][0]; + d += e[a][2] * f[a][1]; + g += e[a][2] * f[a][2]; + } + fn2(h, g); +} + +/* { dg-final { scan-assembler-not "vshufps\[ \\t\]+\[^\n\]*%\xmm(?:1\[6-9\]|\[2-3\]\[0-9\])" } } */ |