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| author | Richard Henderson <rth@cygnus.com> | 1998-04-01 17:33:22 -0800 |
|---|---|---|
| committer | Richard Henderson <rth@gcc.gnu.org> | 1998-04-01 17:33:22 -0800 |
| commit | 4901a643933d7005c4745beec0fee58552412b2b (patch) | |
| tree | db879bb0cbd7705231be9699bf8bea0a63c36112 /gcc | |
| parent | 79363e2fa5721e0f2be637519bb7e40881fb98a1 (diff) | |
| download | gcc-4901a643933d7005c4745beec0fee58552412b2b.zip gcc-4901a643933d7005c4745beec0fee58552412b2b.tar.gz gcc-4901a643933d7005c4745beec0fee58552412b2b.tar.bz2 | |
emit-rtl.c (gen_lowpart_common): Skip count by HARD_REGNO_NREGS.
* emit-rtl.c (gen_lowpart_common): Skip count by HARD_REGNO_NREGS.
(gen_highpart): Likewise.
From-SVN: r18945
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 3 | ||||
| -rw-r--r-- | gcc/emit-rtl.c | 32 |
2 files changed, 24 insertions, 11 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 80459cb..9eea255 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -3,6 +3,9 @@ Thu Apr 2 01:01:34 1998 Richard Henderson <rth@cygnus.com> * configure (alpha-*-linuxecoff, alpha-*-linux-gnulibc1): Run fixincludes. + * emit-rtl.c (gen_lowpart_common): Skip count by HARD_REGNO_NREGS. + (gen_highpart): Likewise. + Wed Apr 1 22:26:22 1998 Jeffrey A Law (law@cygnus.com) * fold-const.c optimze_bit_field_compare): Initialize rnbitpos, diff --git a/gcc/emit-rtl.c b/gcc/emit-rtl.c index 54af3b8..fe99e8e 100644 --- a/gcc/emit-rtl.c +++ b/gcc/emit-rtl.c @@ -652,6 +652,17 @@ gen_lowpart_common (mode, x) : gen_rtx_SUBREG (mode, SUBREG_REG (x), SUBREG_WORD (x) + word)); else if (GET_CODE (x) == REG) { + /* Let the backend decide how many registers to skip. This is needed + in particular for Sparc64 where fp regs are smaller than a word. */ + /* ??? Note that subregs are now ambiguous, in that those against + pseudos are sized by the Word Size, while those against hard + regs are sized by the underlying register size. Better would be + to always interpret the subreg offset parameter as bytes or bits. */ + + if (WORDS_BIG_ENDIAN && REGNO (x) < FIRST_PSEUDO_REGISTER) + word = (HARD_REGNO_NREGS (REGNO (x), GET_MODE (x)) + - HARD_REGNO_NREGS (REGNO (x), mode)); + /* If the register is not valid for MODE, return 0. If we don't do this, there is no way to fix up the resulting REG later. But we do do this if the current REG is not valid for its @@ -1002,17 +1013,16 @@ gen_highpart (mode, x) { int word = 0; - if (! WORDS_BIG_ENDIAN - && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD) - word = ((GET_MODE_SIZE (GET_MODE (x)) - - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD)) - / UNITS_PER_WORD); - - /* - * ??? This fails miserably for complex values being passed in registers - * where the sizeof the real and imaginary part are not equal to the - * sizeof SImode. FIXME - */ + /* Let the backend decide how many registers to skip. This is needed + in particular for sparc64 where fp regs are smaller than a word. */ + /* ??? Note that subregs are now ambiguous, in that those against + pseudos are sized by the Word Size, while those against hard + regs are sized by the underlying register size. Better would be + to always interpret the subreg offset parameter as bytes or bits. */ + + if (! WORDS_BIG_ENDIAN && REGNO (x) < FIRST_PSEUDO_REGISTER) + word = (HARD_REGNO_NREGS (REGNO (x), GET_MODE (x)) + - HARD_REGNO_NREGS (REGNO (x), mode)); if (REGNO (x) < FIRST_PSEUDO_REGISTER /* integrate.c can't handle parts of a return value register. */ |