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| author | Torbjorn Granlund <tege@gnu.org> | 1992-03-14 05:15:27 +0000 |
|---|---|---|
| committer | Torbjorn Granlund <tege@gnu.org> | 1992-03-14 05:15:27 +0000 |
| commit | 448ff736e264dda31cce6816b712ddf96dbec057 (patch) | |
| tree | e76ec5fa84943a3dccceaa95c7e40367ccaaae63 /gcc | |
| parent | d45cf215ee7cefef0044a6bd3ee1c2c7b2466039 (diff) | |
| download | gcc-448ff736e264dda31cce6816b712ddf96dbec057.zip gcc-448ff736e264dda31cce6816b712ddf96dbec057.tar.gz gcc-448ff736e264dda31cce6816b712ddf96dbec057.tar.bz2 | |
*** empty log message ***
From-SVN: r473
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/config/arm/arm.md | 18 |
1 files changed, 8 insertions, 10 deletions
diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md index c2aab80..17d05b4 100644 --- a/gcc/config/arm/arm.md +++ b/gcc/config/arm/arm.md @@ -132,12 +132,10 @@ ;; Multiplication insns -;; Note the '&' in the following insn which tells GCC that the second operand -;; must be corruptable and hence not equal to the first. (Too strict in fact.) - +;; The `&' is too strict, but at least generates correct code. (define_insn "mulsi3" - [(set (match_operand:SI 0 "register_operand" "=r") - (mult:SI (match_operand:SI 1 "register_operand" "&r") + [(set (match_operand:SI 0 "register_operand" "=&r") + (mult:SI (match_operand:SI 1 "register_operand" "%r") (match_operand:SI 2 "register_operand" "r")))] "" "* @@ -150,9 +148,9 @@ ;; Unnamed templates to match MLA instruction. (define_insn "" - [(set (match_operand:SI 0 "register_operand" "=r") + [(set (match_operand:SI 0 "register_operand" "=&r") (plus:SI - (mult:SI (match_operand:SI 1 "register_operand" "&r") + (mult:SI (match_operand:SI 1 "register_operand" "%r") (match_operand:SI 2 "register_operand" "r")) (match_operand:SI 3 "register_operand" "r")))] "" @@ -164,10 +162,10 @@ ") (define_insn "" - [(set (match_operand:SI 0 "register_operand" "=r") + [(set (match_operand:SI 0 "register_operand" "=&r") (plus:SI (match_operand:SI 3 "register_operand" "r") - (mult:SI (match_operand:SI 1 "register_operand" "&r") + (mult:SI (match_operand:SI 1 "register_operand" "%r") (match_operand:SI 2 "register_operand" "r"))))] "" "* @@ -522,7 +520,7 @@ return (arm_output_asm_insn (\"mvfs\\t%0, %1\", operands)); ") -;; Zero extention instructions. +;; Zero extension instructions. (define_expand "zero_extendhisi2" [(set (match_operand:SI 0 "register_operand" "") |