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| author | Richard Sandiford <rsandifo@nildram.co.uk> | 2007-10-21 09:24:16 +0000 |
|---|---|---|
| committer | Richard Sandiford <rsandifo@gcc.gnu.org> | 2007-10-21 09:24:16 +0000 |
| commit | 43029c1033d4e420ff02f1529fa9f99616a20021 (patch) | |
| tree | 2895d588fc9d854946a9ab6594851b5908872620 /gcc | |
| parent | 7c6794f4843066ea2657691a94db06e5487e0097 (diff) | |
| download | gcc-43029c1033d4e420ff02f1529fa9f99616a20021.zip gcc-43029c1033d4e420ff02f1529fa9f99616a20021.tar.gz gcc-43029c1033d4e420ff02f1529fa9f99616a20021.tar.bz2 | |
mips.c (mips_cannot_change_mode_class): Don't check for modes smaller than 4 bytes.
gcc/
* config/mips/mips.c (mips_cannot_change_mode_class): Don't check
for modes smaller than 4 bytes.
* config/mips/mips.md (*movhi_internal, *movqi_internal): Remove
FPR alternatives.
From-SVN: r129528
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 7 | ||||
| -rw-r--r-- | gcc/config/mips/mips.c | 10 | ||||
| -rw-r--r-- | gcc/config/mips/mips.md | 20 |
3 files changed, 17 insertions, 20 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 74526c8..ab5dc76 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,5 +1,12 @@ 2007-10-21 Richard Sandiford <rsandifo@nildram.co.uk> + * config/mips/mips.c (mips_cannot_change_mode_class): Don't check + for modes smaller than 4 bytes. + * config/mips/mips.md (*movhi_internal, *movqi_internal): Remove + FPR alternatives. + +2007-10-21 Richard Sandiford <rsandifo@nildram.co.uk> + * config/mips/mips-protos.h (mips_output_aligned_bss): Delete. * config/mips/linux.h (BSS_SECTION_ASM_OP): Delete. (ASM_OUTPUT_ALIGNED_BSS): Delete. diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c index 0e647be..92d85af 100644 --- a/gcc/config/mips/mips.c +++ b/gcc/config/mips/mips.c @@ -8843,14 +8843,8 @@ mips_cannot_change_mode_class (enum machine_mode from ATTRIBUTE_UNUSED, - If the FPU has already interpreted a value in one format, we must not ask it to treat the value as having a different format. - We therefore only allow changes between 4-byte and smaller integer - values, all of which have the "W" format as far as the FPU is - concerned. */ - return (reg_classes_intersect_p (FP_REGS, class) - && (GET_MODE_CLASS (from) != MODE_INT - || GET_MODE_CLASS (to) != MODE_INT - || GET_MODE_SIZE (from) > 4 - || GET_MODE_SIZE (to) > 4)); + We therefore disallow all mode changes involving FPRs. */ + return reg_classes_intersect_p (FP_REGS, class); } /* Return true if moves in mode MODE can use the FPU's mov.fmt instruction. */ diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md index 89edc2c..ebf8104 100644 --- a/gcc/config/mips/mips.md +++ b/gcc/config/mips/mips.md @@ -3757,8 +3757,8 @@ }) (define_insn "*movhi_internal" - [(set (match_operand:HI 0 "nonimmediate_operand" "=d,d,d,m,*d,*f,*x") - (match_operand:HI 1 "move_operand" "d,I,m,dJ,*f,*d,*d"))] + [(set (match_operand:HI 0 "nonimmediate_operand" "=d,d,d,m,*x") + (match_operand:HI 1 "move_operand" "d,I,m,dJ,*d"))] "!TARGET_MIPS16 && (register_operand (operands[0], HImode) || reg_or_0_operand (operands[1], HImode))" @@ -3767,12 +3767,10 @@ li\t%0,%1 lhu\t%0,%1 sh\t%z1,%0 - mfc1\t%0,%1 - mtc1\t%1,%0 mt%0\t%1" - [(set_attr "type" "move,arith,load,store,mfc,mtc,mthilo") + [(set_attr "type" "move,arith,load,store,mthilo") (set_attr "mode" "HI") - (set_attr "length" "4,4,*,*,4,4,4")]) + (set_attr "length" "4,4,*,*,4")]) (define_insn "*movhi_mips16" [(set (match_operand:HI 0 "nonimmediate_operand" "=d,y,d,d,d,d,m") @@ -3863,8 +3861,8 @@ }) (define_insn "*movqi_internal" - [(set (match_operand:QI 0 "nonimmediate_operand" "=d,d,d,m,*d,*f,*x") - (match_operand:QI 1 "move_operand" "d,I,m,dJ,*f,*d,*d"))] + [(set (match_operand:QI 0 "nonimmediate_operand" "=d,d,d,m,*x") + (match_operand:QI 1 "move_operand" "d,I,m,dJ,*d"))] "!TARGET_MIPS16 && (register_operand (operands[0], QImode) || reg_or_0_operand (operands[1], QImode))" @@ -3873,12 +3871,10 @@ li\t%0,%1 lbu\t%0,%1 sb\t%z1,%0 - mfc1\t%0,%1 - mtc1\t%1,%0 mt%0\t%1" - [(set_attr "type" "move,arith,load,store,mfc,mtc,mthilo") + [(set_attr "type" "move,arith,load,store,mthilo") (set_attr "mode" "QI") - (set_attr "length" "4,4,*,*,4,4,4")]) + (set_attr "length" "4,4,*,*,4")]) (define_insn "*movqi_mips16" [(set (match_operand:QI 0 "nonimmediate_operand" "=d,y,d,d,d,d,m") |