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author | Gavin Romig-Koch <gavin@cygnus.com> | 1999-03-16 08:04:00 +0000 |
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committer | Gavin Romig-Koch <gavin@gcc.gnu.org> | 1999-03-16 08:04:00 +0000 |
commit | 3ce1ba83d698f792310b7880703dc8b351f82bd2 (patch) | |
tree | daec3e61df962dddb93f254864391c683cec34d7 /gcc | |
parent | fb1bf66d61d4ca57367230000babd5ab9c50b6c1 (diff) | |
download | gcc-3ce1ba83d698f792310b7880703dc8b351f82bd2.zip gcc-3ce1ba83d698f792310b7880703dc8b351f82bd2.tar.gz gcc-3ce1ba83d698f792310b7880703dc8b351f82bd2.tar.bz2 |
invoke.texi: Add -mlong32 documentation.
* invoke.texi: Add -mlong32 documentation.
* config/mips/mips.h (mips_explicit_type_size_string): New.
(TARGET_SWITCHES): Add 'long32'.
(TARGET_OPTIONS): Add 'explicit-type-size'.
(CC1_SPECS): Set -mexplicit-type-size.
(LONG_MAX_SPEC): Change a use of 'no-long64' to 'long32'.
* config/mips/abi64.h (LONG_MAX_SPEC): Same. Add 'mabi=32'.
* config/mips/mips.c (mips_explicit_type_size_string): New.
(override_options): Use it.
* config/mips/osfrose.h (CC1_SPECS): Set -mexplicit-type-size.
* config/mips/mips.h (SUBTARGET_CPP_SIZE_SPEC):
Pointer size now depends on both size longs and size of GP
registers.
From-SVN: r25799
Diffstat (limited to 'gcc')
-rw-r--r-- | gcc/ChangeLog | 17 | ||||
-rw-r--r-- | gcc/config/mips/abi64.h | 2 | ||||
-rw-r--r-- | gcc/config/mips/mips.c | 15 | ||||
-rw-r--r-- | gcc/config/mips/mips.h | 10 | ||||
-rw-r--r-- | gcc/config/mips/osfrose.h | 1 | ||||
-rw-r--r-- | gcc/invoke.texi | 23 |
6 files changed, 54 insertions, 14 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 30f2855..17955b8 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,20 @@ +Tue Mar 16 10:53:17 1999 Gavin Romig-Koch <gavin@cygnus.com> + + * invoke.texi: Add -mlong32 documentation. + * config/mips/mips.h (mips_explicit_type_size_string): New. + (TARGET_SWITCHES): Add 'long32'. + (TARGET_OPTIONS): Add 'explicit-type-size'. + (CC1_SPECS): Set -mexplicit-type-size. + (LONG_MAX_SPEC): Change a use of 'no-long64' to 'long32'. + * config/mips/abi64.h (LONG_MAX_SPEC): Same. Add 'mabi=32'. + * config/mips/mips.c (mips_explicit_type_size_string): New. + (override_options): Use it. + * config/mips/osfrose.h (CC1_SPECS): Set -mexplicit-type-size. + + * config/mips/mips.h (SUBTARGET_CPP_SIZE_SPEC): + Pointer size now depends on both size longs and size of GP + registers. + Tue Mar 16 10:22:22 1999 Gavin Romig-Koch <gavin@cygnus.com> * config/mips/iris.h (CTORS_SECTION_ASM_OP,DTORS_SECTION_ASM_OP, diff --git a/gcc/config/mips/abi64.h b/gcc/config/mips/abi64.h index 9aa6bfb..e174879 100644 --- a/gcc/config/mips/abi64.h +++ b/gcc/config/mips/abi64.h @@ -223,7 +223,7 @@ extern struct rtx_def *mips_function_value (); #undef LONG_MAX_SPEC #if ((MIPS_ABI_DEFAULT == ABI_64) || ((MIPS_ABI_DEFAULT == ABI_EABI) && ((TARGET_DEFAULT | TARGET_CPU_DEFAULT) & MASK_64BIT))) #define LONG_MAX_SPEC \ - "%{!mabi=n32:%{!mno-long64:%{!mgp32:%{!mips1:%{!mips2:-D__LONG_MAX__=9223372036854775807L}}}}}" + "%{!mabi=32:%{!mabi=n32:%{!mlong32:%{!mgp32:%{!mips1:%{!mips2:-D__LONG_MAX__=9223372036854775807L}}}}}}" #else #define LONG_MAX_SPEC \ "%{mabi=64:-D__LONG_MAX__=9223372036854775807L} \ diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c index 569db0d..50fb10e 100644 --- a/gcc/config/mips/mips.c +++ b/gcc/config/mips/mips.c @@ -221,6 +221,11 @@ int mips16; just a way to avoid using up another bit in target_flags. */ const char *mips_no_mips16_string; +/* This is only used to determine if an type size setting option was + explicitly specified (-mlong64, -mint64, -mlong32). The specs + set this option if such an option is used. */ +char *mips_explicit_type_size_string; + /* Whether we are generating mips16 hard float code. In mips16 mode we always set TARGET_SOFT_FLOAT; this variable is nonzero if -msoft-float was not specified by the user, which means that we @@ -4122,10 +4127,12 @@ override_options () if (mips_abi == ABI_32) target_flags &= ~ (MASK_FLOAT64|MASK_64BIT); - /* In the EABI in 64 bit mode, longs and pointers are 64 bits. Likewise - for the SGI Irix6 N64 ABI. */ - if ((mips_abi == ABI_EABI && TARGET_64BIT) - || mips_abi == ABI_64) + /* If no type size setting options (-mlong64,-mint64,-mlong32) were used + then set the type sizes. In the EABI in 64 bit mode, longs and + pointers are 64 bits. Likewise for the SGI Irix6 N64 ABI. */ + if (mips_explicit_type_size_string == NULL + && ((mips_abi == ABI_EABI && TARGET_64BIT) + || mips_abi == ABI_64)) target_flags |= MASK_LONG64; /* ??? This doesn't work yet, so don't let people try to use it. */ diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h index ea71740..b7e2d8e 100644 --- a/gcc/config/mips/mips.h +++ b/gcc/config/mips/mips.h @@ -146,6 +146,7 @@ extern const char *mips_isa_string; /* for -mips{1,2,3,4} */ extern const char *mips_abi_string; /* for -mabi={32,n32,64} */ extern const char *mips_entry_string; /* for -mentry */ extern const char *mips_no_mips16_string;/* for -mno-mips16 */ +extern const char *mips_explicit_type_size_string;/* for -mexplicit-type-size */ extern int mips_split_addresses; /* perform high/lo_sum support */ extern int dslots_load_total; /* total # load related delay slots */ extern int dslots_load_filled; /* # filled load delay slots */ @@ -453,6 +454,7 @@ extern void mips_select_section (); { \ {"int64", MASK_INT64 | MASK_LONG64}, \ {"long64", MASK_LONG64}, \ + {"long32", -(MASK_LONG64 | MASK_INT64)}, \ {"split-addresses", MASK_SPLIT_ADDR}, \ {"no-split-addresses", -MASK_SPLIT_ADDR}, \ {"mips-as", -MASK_GAS}, \ @@ -576,7 +578,8 @@ extern void mips_select_section (); { "cpu=", &mips_cpu_string }, \ { "ips", &mips_isa_string }, \ { "entry", &mips_entry_string }, \ - { "no-mips16", &mips_no_mips16_string } \ + { "no-mips16", &mips_no_mips16_string }, \ + { "explicit-type-size", &mips_explicit_type_size_string } \ } /* This is meant to be redefined in the host dependent files. */ @@ -888,6 +891,7 @@ while (0) %{mips4:%{!msingle-float:%{!m4650:-mfp64}} -mgp64} \ %{mfp64:%{msingle-float:%emay not use both -mfp64 and -msingle-float}} \ %{mfp64:%{m4650:%emay not use both -mfp64 and -m4650}} \ +%{mint64|mlong64|mlong32:-mexplicit-type-size }\ %{m4650:-mcpu=r4650} \ %{m3900:-mips1 -mcpu=r3900 -mfp32 -mgp32} \ %{G*} %{EB:-meb} %{EL:-mel} %{EB:%{EL:%emay not use both -EB and -EL}} \ @@ -906,7 +910,7 @@ while (0) #ifndef SUBTARGET_CPP_SIZE_SPEC #define SUBTARGET_CPP_SIZE_SPEC "\ -%{mlong64:-D__SIZE_TYPE__=long\\ unsigned\\ int -D__PTRDIFF_TYPE__=long\\ int} \ +%{mlong64:%{!mips1:%{!mips2:-D__SIZE_TYPE__=long\\ unsigned\\ int -D__PTRDIFF_TYPE__=long\\ int}}} \ %{!mlong64:-D__SIZE_TYPE__=unsigned\\ int -D__PTRDIFF_TYPE__=int}" #endif @@ -920,7 +924,7 @@ while (0) correctly. Similarly for 64bit ints and __INT_MAX__. */ #ifndef LONG_MAX_SPEC #if ((TARGET_DEFAULT | TARGET_CPU_DEFAULT) & MASK_LONG64) -#define LONG_MAX_SPEC "%{!mno-long64:-D__LONG_MAX__=9223372036854775807L}" +#define LONG_MAX_SPEC "%{!mlong32:-D__LONG_MAX__=9223372036854775807L}" #else #define LONG_MAX_SPEC "%{mlong64:-D__LONG_MAX__=9223372036854775807L}" #endif diff --git a/gcc/config/mips/osfrose.h b/gcc/config/mips/osfrose.h index ee76053..3d92619 100644 --- a/gcc/config/mips/osfrose.h +++ b/gcc/config/mips/osfrose.h @@ -76,6 +76,7 @@ Boston, MA 02111-1307, USA. */ #define CC1_SPEC "\ %{gline:%{!g:%{!g0:%{!g1:%{!g2: -g1}}}}} \ %{mips1:-mfp32 -mgp32} %{mips2:-mfp32 -mgp32} %{mips3:-mfp64 -mgp64} \ +%{mint64|mlong64|mlong32:-mexplicit-type-size }\ %{G*} \ %{pic-none: -mno-half-pic} \ %{pic-lib: -mhalf-pic} \ diff --git a/gcc/invoke.texi b/gcc/invoke.texi index d05ef37..5ea74bf 100644 --- a/gcc/invoke.texi +++ b/gcc/invoke.texi @@ -322,7 +322,7 @@ in the following sections. -mabicalls -mcpu=@var{cpu type} -membedded-data -membedded-pic -mfp32 -mfp64 -mgas -mgp32 -mgp64 -mgpopt -mhalf-pic -mhard-float -mint64 -mips1 --mips2 -mips3 -mips4 -mlong64 -mlong-calls -mmemcpy +-mips2 -mips3 -mips4 -mlong64 -mlong32 -mlong-calls -mmemcpy -mmips-as -mmips-tfile -mno-abicalls -mno-embedded-data -mno-embedded-pic -mno-gpopt -mno-long-calls @@ -4788,14 +4788,25 @@ Assume that 32 64-bit general purpose registers are available. This is the default when the @samp{-mips3} option is used. @item -mint64 -Force int and long types to be 64 bits wide. See @samp{-mlong64} for an -explanation of the width of pointers. +Force int and long types to be 64 bits wide. See @samp{-mlong32} for an +explanation of the default, and the width of pointers. @item -mlong64 -Force long types to be 64 bits wide. +Force long types to be 64 bits wide. See @samp{-mlong32} for an +explanation of the default, and the width of pointers. -The width of pointer types is the smaller of the width of longs -or the width of general purpose registers. +@item -mlong32 +Force long, int, and pointer types to be 32 bits wide. + +If none of @samp{-mlong32}, @samp{-mlong64}, or @samp{-mint64} are set, +the size of ints, longs, and pointers depends on the ABI and ISA choosen. +For @samp{-mabi=32}, and @samp{-mabi=n32}, ints and longs are 32 bits +wide. For @samp{-mabi=64}, ints are 32 bits, and longs are 64 bits wide. +For @samp{-mabi=eabi} and either @samp{-mips1} or @samp{-mips2}, ints +and longs are 32 bits wide. For @samp{-mabi=eabi} and higher ISAs, ints +are 32 bits, and longs are 64 bits wide. The width of pointer types is +the smaller of the width of longs or the width of general purpose +registers (which in turn depends on the ISA). @itemx -mabi=32 @itemx -mabi=n32 |