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| author | Kazu Hirata <kazu@hxi.com> | 2002-02-23 13:45:36 +0000 |
|---|---|---|
| committer | Kazu Hirata <kazu@gcc.gnu.org> | 2002-02-23 13:45:36 +0000 |
| commit | 35dad9f1bc59f6615af16d0592ace268a34ea366 (patch) | |
| tree | ba8f4089f25e702072a6b45d0e9c8efab5cf72c9 /gcc | |
| parent | ab8e22289cf3abb612686e52c1ea370f0aa6c1b1 (diff) | |
| download | gcc-35dad9f1bc59f6615af16d0592ace268a34ea366.zip gcc-35dad9f1bc59f6615af16d0592ace268a34ea366.tar.gz gcc-35dad9f1bc59f6615af16d0592ace268a34ea366.tar.bz2 | |
h8300.md (mulqihi3): Tighten predicates to register_operand.
* config/h8300/h8300.md (mulqihi3): Tighten predicates to
register_operand.
(mulhisi3): Likewise.
(umulqisi3): Likewise.
(umulhisi3): Likewise.
From-SVN: r49994
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 8 | ||||
| -rw-r--r-- | gcc/config/h8300/h8300.md | 8 |
2 files changed, 12 insertions, 4 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 6e6db28..bc546ad 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,11 @@ +2002-02-23 Kazu Hirata <kazu@hxi.com> + + * config/h8300/h8300.md (mulqihi3): Tighten predicates to + register_operand. + (mulhisi3): Likewise. + (umulqisi3): Likewise. + (umulhisi3): Likewise. + 2002-02-23 Neil Booth <neil@daikokuya.demon.co.uk> * cppinit.c (output_deps): Correct test for stdout output. diff --git a/gcc/config/h8300/h8300.md b/gcc/config/h8300/h8300.md index b9dc640..d99103e 100644 --- a/gcc/config/h8300/h8300.md +++ b/gcc/config/h8300/h8300.md @@ -841,7 +841,7 @@ (define_insn "mulqihi3" [(set (match_operand:HI 0 "register_operand" "=r") - (mult:HI (sign_extend:HI (match_operand:QI 1 "general_operand" "%0")) + (mult:HI (sign_extend:HI (match_operand:QI 1 "register_operand" "%0")) (sign_extend:HI (match_operand:QI 2 "register_operand" "r"))))] "TARGET_H8300H || TARGET_H8300S" "mulxs.b %X2,%T0" @@ -850,7 +850,7 @@ (define_insn "mulhisi3" [(set (match_operand:SI 0 "register_operand" "=r") - (mult:SI (sign_extend:SI (match_operand:HI 1 "general_operand" "%0")) + (mult:SI (sign_extend:SI (match_operand:HI 1 "register_operand" "%0")) (sign_extend:SI (match_operand:HI 2 "register_operand" "r"))))] "TARGET_H8300H || TARGET_H8300S" "mulxs.w %T2,%S0" @@ -859,7 +859,7 @@ (define_insn "umulqihi3" [(set (match_operand:HI 0 "register_operand" "=r") - (mult:HI (zero_extend:HI (match_operand:QI 1 "general_operand" "%0")) + (mult:HI (zero_extend:HI (match_operand:QI 1 "register_operand" "%0")) (zero_extend:HI (match_operand:QI 2 "register_operand" "r"))))] "" "mulxu %X2,%T0" @@ -868,7 +868,7 @@ (define_insn "umulhisi3" [(set (match_operand:SI 0 "register_operand" "=r") - (mult:SI (zero_extend:SI (match_operand:HI 1 "general_operand" "%0")) + (mult:SI (zero_extend:SI (match_operand:HI 1 "register_operand" "%0")) (zero_extend:SI (match_operand:HI 2 "register_operand" "r"))))] "TARGET_H8300H || TARGET_H8300S" "mulxu.w %T2,%S0" |