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| author | Richard Henderson <rth@redhat.com> | 2011-01-17 10:12:45 -0800 |
|---|---|---|
| committer | Richard Henderson <rth@gcc.gnu.org> | 2011-01-17 10:12:45 -0800 |
| commit | 34fee389ffbd4e8e5a262027b253ca09a54e0578 (patch) | |
| tree | ad095553168784954bd69a18a6266de441a582bf /gcc | |
| parent | 265c835fcfc31603765096a2ce417f37c7dbe32f (diff) | |
| download | gcc-34fee389ffbd4e8e5a262027b253ca09a54e0578.zip gcc-34fee389ffbd4e8e5a262027b253ca09a54e0578.tar.gz gcc-34fee389ffbd4e8e5a262027b253ca09a54e0578.tar.bz2 | |
rx: Fix incorrect usage of + in output operands.
From-SVN: r168926
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 3 | ||||
| -rw-r--r-- | gcc/config/rx/rx.md | 10 |
2 files changed, 8 insertions, 5 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index a71a827..a58c1eb 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,5 +1,8 @@ 2011-01-17 Richard Henderson <rth@redhat.com> + * config/rx/rx.md (bswapsi2): Use = not + for output reload. + (bswaphi2, bitinvert, revw): Likewise. + * config/rx/rx.c (gen_rx_store_vector): Use VOIDmode for gen_rtx_SET. (gen_rx_rtsd_vector, gen_rx_popm_vector): Likewise. * config/rx/rx.md (pop_and_return): Use VOIDmode for SET. diff --git a/gcc/config/rx/rx.md b/gcc/config/rx/rx.md index 7d5a93b..864b4a5 100644 --- a/gcc/config/rx/rx.md +++ b/gcc/config/rx/rx.md @@ -1044,7 +1044,7 @@ ;; Byte swap (single 32-bit value). (define_insn "bswapsi2" - [(set (match_operand:SI 0 "register_operand" "+r") + [(set (match_operand:SI 0 "register_operand" "=r") (bswap:SI (match_operand:SI 1 "register_operand" "r")))] "" "revl\t%1, %0" @@ -1053,7 +1053,7 @@ ;; Byte swap (single 16-bit value). Note - we ignore the swapping of the high 16-bits. (define_insn "bswaphi2" - [(set (match_operand:HI 0 "register_operand" "+r") + [(set (match_operand:HI 0 "register_operand" "=r") (bswap:HI (match_operand:HI 1 "register_operand" "r")))] "" "revw\t%1, %0" @@ -1545,8 +1545,8 @@ (set_attr "timings" "34")] ) -(define_insn "bitinvert" - [(set (match_operand:SI 0 "register_operand" "+r") +(define_insn "*bitinvert" + [(set (match_operand:SI 0 "register_operand" "=r") (xor:SI (match_operand:SI 1 "register_operand" "0") (ashift:SI (const_int 1) (match_operand:SI 2 "nonmemory_operand" "ri"))))] @@ -1931,7 +1931,7 @@ ;; Byte swap (two 16-bit values). (define_insn "revw" - [(set (match_operand:SI 0 "register_operand" "+r") + [(set (match_operand:SI 0 "register_operand" "=r") (unspec:SI [(match_operand:SI 1 "register_operand" "r")] UNSPEC_BUILTIN_REVW))] "" |