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author | Richard Sandiford <rsandifo@nildram.co.uk> | 2007-09-19 22:21:57 +0000 |
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committer | Richard Sandiford <rsandifo@gcc.gnu.org> | 2007-09-19 22:21:57 +0000 |
commit | 30244df3f1d82c45f852c9d39bcb270342a26005 (patch) | |
tree | 18bbece00b2d25d53caf6eaeac8add1a599b6496 /gcc | |
parent | 1c50a20a4f81b9fc6a4451b8951c290bb57cd637 (diff) | |
download | gcc-30244df3f1d82c45f852c9d39bcb270342a26005.zip gcc-30244df3f1d82c45f852c9d39bcb270342a26005.tar.gz gcc-30244df3f1d82c45f852c9d39bcb270342a26005.tar.bz2 |
mips.c (build_mips16_call_stub): Tidy.
gcc/
* config/mips/mips.c (build_mips16_call_stub): Tidy. Fix second
GPR for DCmode on 64-bit targets. Remove redundant fallback.
From-SVN: r128608
Diffstat (limited to 'gcc')
-rw-r--r-- | gcc/ChangeLog | 5 | ||||
-rw-r--r-- | gcc/config/mips/mips.c | 60 |
2 files changed, 25 insertions, 40 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index f336b12..b550aa2 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2007-09-19 Richard Sandiford <rsandifo@nildram.co.uk> + + * config/mips/mips.c (build_mips16_call_stub): Tidy. Fix second + GPR for DCmode on 64-bit targets. Remove redundant fallback. + 2007-09-19 Andrew Pinski <andrew_pinski@playstation.sony.com> * cfgexpand.c (dump_stack_var_partition): Use the correct diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c index 6a4a1d9..7f959f4 100644 --- a/gcc/config/mips/mips.c +++ b/gcc/config/mips/mips.c @@ -10045,50 +10045,30 @@ build_mips16_call_stub (rtx retval, rtx fn, rtx arg_size, int fp_code) fprintf (asm_out_file, "\tjal\t%s\n", fnname); /* As above, we can't fill the delay slot. */ fprintf (asm_out_file, "\tnop\n"); - if (GET_MODE (retval) == SFmode) - fprintf (asm_out_file, "\tmfc1\t%s,%s\n", - reg_names[GP_REG_FIRST + 2], reg_names[FP_REG_FIRST + 0]); - else if (GET_MODE (retval) == SCmode) - { - fprintf (asm_out_file, "\tmfc1\t%s,%s\n", - reg_names[GP_REG_FIRST + 2], - reg_names[FP_REG_FIRST + 0]); + switch (GET_MODE (retval)) + { + case SCmode: fprintf (asm_out_file, "\tmfc1\t%s,%s\n", reg_names[GP_REG_FIRST + 3], reg_names[FP_REG_FIRST + MAX_FPRS_PER_FMT]); - } - else if (GET_MODE (retval) == DFmode - || GET_MODE (retval) == V2SFmode) - { - mips16_fpret_double (GP_REG_FIRST + 2, FP_REG_FIRST + 0); - } - else if (GET_MODE (retval) == DCmode) - { - mips16_fpret_double (GP_REG_FIRST + 2, - FP_REG_FIRST + 0); - mips16_fpret_double (GP_REG_FIRST + 4, + /* Fall though. */ + case SFmode: + fprintf (asm_out_file, "\tmfc1\t%s,%s\n", + reg_names[GP_REG_FIRST + 2], + reg_names[FP_REG_FIRST + 0]); + break; + + case DCmode: + mips16_fpret_double (GP_REG_FIRST + 2 + (8 / UNITS_PER_WORD), FP_REG_FIRST + MAX_FPRS_PER_FMT); - } - else - { - if (TARGET_BIG_ENDIAN) - { - fprintf (asm_out_file, "\tmfc1\t%s,%s\n", - reg_names[GP_REG_FIRST + 2], - reg_names[FP_REG_FIRST + 1]); - fprintf (asm_out_file, "\tmfc1\t%s,%s\n", - reg_names[GP_REG_FIRST + 3], - reg_names[FP_REG_FIRST + 0]); - } - else - { - fprintf (asm_out_file, "\tmfc1\t%s,%s\n", - reg_names[GP_REG_FIRST + 2], - reg_names[FP_REG_FIRST + 0]); - fprintf (asm_out_file, "\tmfc1\t%s,%s\n", - reg_names[GP_REG_FIRST + 3], - reg_names[FP_REG_FIRST + 1]); - } + /* Fall though. */ + case DFmode: + case V2SFmode: + mips16_fpret_double (GP_REG_FIRST + 2, FP_REG_FIRST + 0); + break; + + default: + gcc_unreachable (); } fprintf (asm_out_file, "\tj\t%s\n", reg_names[GP_REG_FIRST + 18]); /* As above, we can't fill the delay slot. */ |