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| author | Richard Sandiford <rsandifo@redhat.com> | 2003-10-30 18:11:27 +0000 |
|---|---|---|
| committer | Richard Sandiford <rsandifo@gcc.gnu.org> | 2003-10-30 18:11:27 +0000 |
| commit | 2e1648b8b70a994c63588f6cc64254c78aca5da6 (patch) | |
| tree | dd1423223df1b6655f226b41827f6cd5bdcb91dd /gcc | |
| parent | db964bded7163e0be2e3d71c103431b3cd4f5bc6 (diff) | |
| download | gcc-2e1648b8b70a994c63588f6cc64254c78aca5da6.zip gcc-2e1648b8b70a994c63588f6cc64254c78aca5da6.tar.gz gcc-2e1648b8b70a994c63588f6cc64254c78aca5da6.tar.bz2 | |
mips.md (mov_lwl): Use memory_operand where appropriate.
* config/mips/mips.md (mov_lwl): Use memory_operand where appropriate.
(mov_lwr, mov_swl, mov_swr): Likewise.
(mov_ldl, mov_ldr, mov_sdl, mov_sdr): Likewise.
From-SVN: r73095
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 6 | ||||
| -rw-r--r-- | gcc/config/mips/mips.md | 24 |
2 files changed, 18 insertions, 12 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 99f3442..8a8dfd01 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,5 +1,11 @@ 2003-10-30 Richard Sandiford <rsandifo@redhat.com> + * config/mips/mips.md (mov_lwl): Use memory_operand where appropriate. + (mov_lwr, mov_swl, mov_swr): Likewise. + (mov_ldl, mov_ldr, mov_sdl, mov_sdr): Likewise. + +2003-10-30 Richard Sandiford <rsandifo@redhat.com> + * config/mips/mips.c (mips_global_pointer): Don't try to use $25. 2003-10-30 Richard Henderson <rth@redhat.com> diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md index def0088..7a082b4 100644 --- a/gcc/config/mips/mips.md +++ b/gcc/config/mips/mips.md @@ -4061,8 +4061,8 @@ dsrl\t%3,%3,1\n\ (define_insn "mov_lwl" [(set (match_operand:SI 0 "register_operand" "=d") - (unspec:SI [(match_operand:BLK 1 "general_operand" "m") - (match_operand:QI 2 "general_operand" "m")] + (unspec:SI [(match_operand:BLK 1 "memory_operand" "m") + (match_operand:QI 2 "memory_operand" "m")] UNSPEC_LWL))] "!TARGET_MIPS16" "lwl\t%0,%2" @@ -4072,8 +4072,8 @@ dsrl\t%3,%3,1\n\ (define_insn "mov_lwr" [(set (match_operand:SI 0 "register_operand" "=d") - (unspec:SI [(match_operand:BLK 1 "general_operand" "m") - (match_operand:QI 2 "general_operand" "m") + (unspec:SI [(match_operand:BLK 1 "memory_operand" "m") + (match_operand:QI 2 "memory_operand" "m") (match_operand:SI 3 "register_operand" "0")] UNSPEC_LWR))] "!TARGET_MIPS16" @@ -4085,7 +4085,7 @@ dsrl\t%3,%3,1\n\ (define_insn "mov_swl" [(set (match_operand:BLK 0 "memory_operand" "=m") (unspec:BLK [(match_operand:SI 1 "reg_or_0_operand" "dJ") - (match_operand:QI 2 "general_operand" "m")] + (match_operand:QI 2 "memory_operand" "m")] UNSPEC_SWL))] "!TARGET_MIPS16" "swl\t%z1,%2" @@ -4095,7 +4095,7 @@ dsrl\t%3,%3,1\n\ (define_insn "mov_swr" [(set (match_operand:BLK 0 "memory_operand" "+m") (unspec:BLK [(match_operand:SI 1 "reg_or_0_operand" "dJ") - (match_operand:QI 2 "general_operand" "m") + (match_operand:QI 2 "memory_operand" "m") (match_dup 0)] UNSPEC_SWR))] "!TARGET_MIPS16" @@ -4106,8 +4106,8 @@ dsrl\t%3,%3,1\n\ (define_insn "mov_ldl" [(set (match_operand:DI 0 "register_operand" "=d") - (unspec:DI [(match_operand:BLK 1 "general_operand" "m") - (match_operand:QI 2 "general_operand" "m")] + (unspec:DI [(match_operand:BLK 1 "memory_operand" "m") + (match_operand:QI 2 "memory_operand" "m")] UNSPEC_LDL))] "TARGET_64BIT && !TARGET_MIPS16" "ldl\t%0,%2" @@ -4116,8 +4116,8 @@ dsrl\t%3,%3,1\n\ (define_insn "mov_ldr" [(set (match_operand:DI 0 "register_operand" "=d") - (unspec:DI [(match_operand:BLK 1 "general_operand" "m") - (match_operand:QI 2 "general_operand" "m") + (unspec:DI [(match_operand:BLK 1 "memory_operand" "m") + (match_operand:QI 2 "memory_operand" "m") (match_operand:DI 3 "register_operand" "0")] UNSPEC_LDR))] "TARGET_64BIT && !TARGET_MIPS16" @@ -4129,7 +4129,7 @@ dsrl\t%3,%3,1\n\ (define_insn "mov_sdl" [(set (match_operand:BLK 0 "memory_operand" "=m") (unspec:BLK [(match_operand:DI 1 "reg_or_0_operand" "dJ") - (match_operand:QI 2 "general_operand" "m")] + (match_operand:QI 2 "memory_operand" "m")] UNSPEC_SDL))] "TARGET_64BIT && !TARGET_MIPS16" "sdl\t%z1,%2" @@ -4139,7 +4139,7 @@ dsrl\t%3,%3,1\n\ (define_insn "mov_sdr" [(set (match_operand:BLK 0 "memory_operand" "+m") (unspec:BLK [(match_operand:DI 1 "reg_or_0_operand" "dJ") - (match_operand:QI 2 "general_operand" "m") + (match_operand:QI 2 "memory_operand" "m") (match_dup 0)] UNSPEC_SDR))] "TARGET_64BIT && !TARGET_MIPS16" |