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| author | zhengnannan <zhengnannan@huawei.com> | 2020-10-26 13:02:18 +0000 |
|---|---|---|
| committer | Richard Sandiford <richard.sandiford@arm.com> | 2020-10-26 13:02:18 +0000 |
| commit | 2d5aad691f5bd605cfc27ce16a1f2d023cd21f75 (patch) | |
| tree | aee1a9545aaa29a180e6e67b13c052b11128faff /gcc | |
| parent | 93e9a7bcd5434a24c945de33cd7fa01a25f68418 (diff) | |
| download | gcc-2d5aad691f5bd605cfc27ce16a1f2d023cd21f75.zip gcc-2d5aad691f5bd605cfc27ce16a1f2d023cd21f75.tar.gz gcc-2d5aad691f5bd605cfc27ce16a1f2d023cd21f75.tar.bz2 | |
AArch64: Add FLAG for store intrinsics [PR94442]
2020-10-26 Zhiheng Xie <xiezhiheng@huawei.com>
Nannan Zheng <zhengnannan@huawei.com>
gcc/ChangeLog:
* config/aarch64/aarch64-builtins.c: Add FLAG STORE.
* config/aarch64/aarch64-simd-builtins.def: Add proper FLAG
for store intrinsics.
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/config/aarch64/aarch64-builtins.c | 1 | ||||
| -rw-r--r-- | gcc/config/aarch64/aarch64-simd-builtins.def | 22 |
2 files changed, 12 insertions, 11 deletions
diff --git a/gcc/config/aarch64/aarch64-builtins.c b/gcc/config/aarch64/aarch64-builtins.c index 732a4dc..9d5e8c7 100644 --- a/gcc/config/aarch64/aarch64-builtins.c +++ b/gcc/config/aarch64/aarch64-builtins.c @@ -132,6 +132,7 @@ const unsigned int FLAG_AUTO_FP = 1U << 5; const unsigned int FLAG_FP = FLAG_READ_FPCR | FLAG_RAISE_FP_EXCEPTIONS; const unsigned int FLAG_ALL = FLAG_READ_FPCR | FLAG_RAISE_FP_EXCEPTIONS | FLAG_READ_MEMORY | FLAG_PREFETCH_MEMORY | FLAG_WRITE_MEMORY; +const unsigned int FLAG_STORE = FLAG_WRITE_MEMORY | FLAG_AUTO_FP; typedef struct { diff --git a/gcc/config/aarch64/aarch64-simd-builtins.def b/gcc/config/aarch64/aarch64-simd-builtins.def index 5bc596d..bae7a04 100644 --- a/gcc/config/aarch64/aarch64-simd-builtins.def +++ b/gcc/config/aarch64/aarch64-simd-builtins.def @@ -111,13 +111,13 @@ BUILTIN_VALLDIF (LOADSTRUCT_LANE, ld3_lane, 0, ALL) BUILTIN_VALLDIF (LOADSTRUCT_LANE, ld4_lane, 0, ALL) /* Implemented by aarch64_st<VSTRUCT:nregs><VDC:mode>. */ - BUILTIN_VDC (STORESTRUCT, st2, 0, ALL) - BUILTIN_VDC (STORESTRUCT, st3, 0, ALL) - BUILTIN_VDC (STORESTRUCT, st4, 0, ALL) + BUILTIN_VDC (STORESTRUCT, st2, 0, STORE) + BUILTIN_VDC (STORESTRUCT, st3, 0, STORE) + BUILTIN_VDC (STORESTRUCT, st4, 0, STORE) /* Implemented by aarch64_st<VSTRUCT:nregs><VQ:mode>. */ - BUILTIN_VQ (STORESTRUCT, st2, 0, ALL) - BUILTIN_VQ (STORESTRUCT, st3, 0, ALL) - BUILTIN_VQ (STORESTRUCT, st4, 0, ALL) + BUILTIN_VQ (STORESTRUCT, st2, 0, STORE) + BUILTIN_VQ (STORESTRUCT, st3, 0, STORE) + BUILTIN_VQ (STORESTRUCT, st4, 0, STORE) BUILTIN_VALLDIF (STORESTRUCT_LANE, st2_lane, 0, ALL) BUILTIN_VALLDIF (STORESTRUCT_LANE, st3_lane, 0, ALL) @@ -482,8 +482,8 @@ VAR1(STORE1P, ld1, 0, ALL, v2di) /* Implemented by aarch64_st1<VALL_F16:mode>. */ - BUILTIN_VALL_F16 (STORE1, st1, 0, ALL) - VAR1(STORE1P, st1, 0, ALL, v2di) + BUILTIN_VALL_F16 (STORE1, st1, 0, STORE) + VAR1 (STORE1P, st1, 0, STORE, v2di) /* Implemented by aarch64_ld1x3<VALLDIF:mode>. */ BUILTIN_VALLDIF (LOADSTRUCT, ld1x3, 0, ALL) @@ -492,13 +492,13 @@ BUILTIN_VALLDIF (LOADSTRUCT, ld1x4, 0, ALL) /* Implemented by aarch64_st1x2<VALLDIF:mode>. */ - BUILTIN_VALLDIF (STORESTRUCT, st1x2, 0, ALL) + BUILTIN_VALLDIF (STORESTRUCT, st1x2, 0, STORE) /* Implemented by aarch64_st1x3<VALLDIF:mode>. */ - BUILTIN_VALLDIF (STORESTRUCT, st1x3, 0, ALL) + BUILTIN_VALLDIF (STORESTRUCT, st1x3, 0, STORE) /* Implemented by aarch64_st1x4<VALLDIF:mode>. */ - BUILTIN_VALLDIF (STORESTRUCT, st1x4, 0, ALL) + BUILTIN_VALLDIF (STORESTRUCT, st1x4, 0, STORE) /* Implemented by fma<mode>4. */ BUILTIN_VHSDF (TERNOP, fma, 4, ALL) |