re PR target/40470 (unable to find a register to spill in class ‘SSE_FIRST_REG’)

gcc/

2009-06-18  H.J. Lu  <hongjiu.lu@intel.com>

	PR target/40470
	* config/i386/i386.h (CLASS_LIKELY_SPILLED_P): Add SSE_FIRST_REG.

gcc/testsuite/

2009-06-18  H.J. Lu  <hongjiu.lu@intel.com>

	PR target/40470
	* gcc.dg/torture/pr40470-1.c: New.
	* gcc.dg/torture/pr40470-2.c: Likewise.
	* gcc.dg/torture/pr40470-3.c: Likewise.
	* gcc.dg/torture/pr40470-4.c: Likewise.

From-SVN: r148673

7 files changed, 114 insertions, 0 deletions

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index af65356..55ffbfd 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2009-06-18  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR target/40470
+	* config/i386/i386.h (CLASS_LIKELY_SPILLED_P): Add SSE_FIRST_REG.
+
 2009-06-18  Diego Novillo  <dnovillo@google.com>
 
 	* doc/plugins.texi: Document plugin_is_GPL_compatible.
diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h
index 657c8ae..7592f6b 100644
--- a/gcc/config/i386/i386.h
+++ b/gcc/config/i386/i386.h
@@ -1498,6 +1498,7 @@ enum reg_class
    || ((CLASS) == AD_REGS)						\
    || ((CLASS) == SIREG)						\
    || ((CLASS) == DIREG)						\
+   || ((CLASS) == SSE_FIRST_REG)					\
    || ((CLASS) == FP_TOP_REG)						\
    || ((CLASS) == FP_SECOND_REG))
 
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index b6a6fe1..540f408 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,11 @@
+2009-06-18  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR target/40470
+	* gcc.dg/torture/pr40470-1.c: New.
+	* gcc.dg/torture/pr40470-2.c: Likewise.
+	* gcc.dg/torture/pr40470-3.c: Likewise.
+	* gcc.dg/torture/pr40470-4.c: Likewise.
+
 2009-06-18  Diego Novillo  <dnovillo@google.com>
 
 	* gcc.dg/plugin/selfassign.c: Declare plugin_is_GPL_compatible.
diff --git a/gcc/testsuite/gcc.dg/torture/pr40470-1.c b/gcc/testsuite/gcc.dg/torture/pr40470-1.c
new file mode 100644
index 0000000..cb2510e
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/torture/pr40470-1.c
@@ -0,0 +1,22 @@
+/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+/* { dg-options "-msse4" } */
+#include <nmmintrin.h>
+__m128i load (char *);
+char *
+foo (char *p1, char *p2,
+     int bmsk, __m128i mask1, __m128i mask2)
+{
+  int len = 0;
+  __m128i frag1, frag2;
+  int  cmp_s;
+  if( !p2[0]) return p1;
+  if( !p1[0] ) return NULL;
+  frag2 = load (p2); 
+  frag1 = load (p1);
+  frag2 = _mm_blendv_epi8(frag2, mask2, mask1);
+  frag1 = _mm_blendv_epi8(frag1, mask2, mask1);
+  cmp_s = _mm_cmpistrs(frag2, frag1, 0x0c);
+  if( cmp_s )
+    __asm("bsfl %[bmsk], %[len]" : [len] "=r" (len) : [bmsk] "r" (bmsk) );
+  return p1 + len;
+}
diff --git a/gcc/testsuite/gcc.dg/torture/pr40470-2.c b/gcc/testsuite/gcc.dg/torture/pr40470-2.c
new file mode 100644
index 0000000..b0414bb
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/torture/pr40470-2.c
@@ -0,0 +1,27 @@
+/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+/* { dg-options "-msse4" } */
+#include <nmmintrin.h>
+__m128i load (char *);
+char *
+foo (const unsigned char *s1, const unsigned char *s2,
+     int bmsk, __m128i frag2)
+{
+  int len = 0;
+  char *p1 = (char  *) s1;
+  char *p2 = (char  *) s2;
+  __m128i frag1, fruc, mask;
+  int cmp_c, cmp_s;
+  if( !p2[0]) return (char *) s1;
+  if( !p1[0] ) return NULL;
+  if( p2[1]) frag2 = load (p2); 
+  frag1 = load (p1);
+  fruc = _mm_loadu_si128 ((__m128i *) s1);
+  mask = _mm_cmpistrm(fruc, frag2, 0x44);
+  frag2 = _mm_blendv_epi8(frag2, mask, mask);
+  frag1 = _mm_blendv_epi8(frag1, mask, mask);
+  cmp_c = _mm_cmpistrc(frag2, frag1, 0x0c);
+  cmp_s = _mm_cmpistrs(frag2, frag1, 0x0c);
+  if( cmp_s  & cmp_c  )
+    __asm("bsfl %[bmsk], %[len]" : [len] "=r" (len) : [bmsk] "r" (bmsk) );
+  return p2 + len;
+}
diff --git a/gcc/testsuite/gcc.dg/torture/pr40470-3.c b/gcc/testsuite/gcc.dg/torture/pr40470-3.c
new file mode 100644
index 0000000..5c4c361
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/torture/pr40470-3.c
@@ -0,0 +1,22 @@
+/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+/* { dg-options "-msse4" } */
+#include <nmmintrin.h>
+__m128i load (char *);
+char *
+foo (char *p1, char *p2,
+     int bmsk, __m128i mask1, __m128i mask2)
+{
+  int len = 0;
+  __m128i frag1, frag2;
+  int  cmp_s;
+  if( !p2[0]) return p1;
+  if( !p1[0] ) return NULL;
+  frag2 = load (p2); 
+  frag1 = load (p1);
+  frag2 = _mm_blendv_epi8(frag2, mask2, mask1);
+  frag1 = _mm_blendv_epi8(frag1, mask1, mask2);
+  cmp_s = _mm_cmpistrs(frag2, frag1, 0x0c);
+  if( cmp_s )
+    __asm("bsfl %[bmsk], %[len]" : [len] "=r" (len) : [bmsk] "r" (bmsk) );
+  return p1 + len;
+}
diff --git a/gcc/testsuite/gcc.dg/torture/pr40470-4.c b/gcc/testsuite/gcc.dg/torture/pr40470-4.c
new file mode 100644
index 0000000..f9d0e50
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/torture/pr40470-4.c
@@ -0,0 +1,29 @@
+/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
+/* { dg-options "-msse4" } */
+#include <nmmintrin.h>
+__m128i load (char *);
+char *
+foo (const unsigned char *s1, const unsigned char *s2,
+     int bmsk, __m128i frag2)
+{
+  int len = 0;
+  char *p1 = (char  *) s1;
+  char *p2 = (char  *) s2;
+  __m128i frag1, fruc1, fruc2, mask1, mask2;
+  int cmp_c, cmp_s;
+  if( !p2[0]) return (char *) s1;
+  if( !p1[0] ) return NULL;
+  if( p2[1]) frag2 = load (p2); 
+  frag1 = load (p1);
+  fruc1 = _mm_loadu_si128 ((__m128i *) s1);
+  fruc2 = _mm_loadu_si128 ((__m128i *) s2);
+  mask1 = _mm_cmpistrm(fruc1, frag2, 0x44);
+  mask2 = _mm_cmpistrm(fruc2, frag1, 0x14);
+  frag2 = _mm_blendv_epi8(frag2, mask1, mask2);
+  frag1 = _mm_blendv_epi8(frag1, mask2, mask1);
+  cmp_c = _mm_cmpistrc(frag2, frag1, 0x0c);
+  cmp_s = _mm_cmpistrs(frag2, frag1, 0x0c);
+  if( cmp_s  & cmp_c  )
+    __asm("bsfl %[bmsk], %[len]" : [len] "=r" (len) : [bmsk] "r" (bmsk) );
+  return p2 + len;
+}