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| author | Richard Henderson <rth@redhat.com> | 2002-05-30 16:08:27 -0700 |
|---|---|---|
| committer | Richard Henderson <rth@gcc.gnu.org> | 2002-05-30 16:08:27 -0700 |
| commit | 261376e723399348ac2633631aaae6a10042c264 (patch) | |
| tree | 1b6519843c1b03577977280179102bcad816eed6 /gcc | |
| parent | ce60bf25b22ac87577c2e4efdc5a1bdacaa05151 (diff) | |
| download | gcc-261376e723399348ac2633631aaae6a10042c264.zip gcc-261376e723399348ac2633631aaae6a10042c264.tar.gz gcc-261376e723399348ac2633631aaae6a10042c264.tar.bz2 | |
re PR rtl-optimization/6822 (GCC 3.1.1 - Internal compiler error in extract_insn, at recog.c:2132)
PR optimization/6822
* config/i386/i386.c (ix86_expand_int_movcc): Don't cast INTVAL
to unsigned int for op1 comparisons. Use gen_int_mode.
* gcc.c-torture/compile/20020530-1.c: New.
Co-Authored-By: Eric Botcazou <ebotcazou@multimania.com>
From-SVN: r54076
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 7 | ||||
| -rw-r--r-- | gcc/config/i386/i386.c | 12 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.c-torture/compile/20020530-1.c | 16 |
3 files changed, 29 insertions, 6 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 07443b6..b53bcf6 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2002-05-30 Richard Henderson <rth@redhat.com> + Eric Botcazou <ebotcazou@multimania.com> + + PR optimization/6822 + * config/i386/i386.c (ix86_expand_int_movcc): Don't cast INTVAL + to unsigned int for op1 comparisons. Use gen_int_mode. + 2002-05-30 Eric Botcazou <ebotcazou@multimania.com> * expmed.c (const_mult_add_overflow_p): New. diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index f89d163..3486046 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -8677,11 +8677,12 @@ ix86_expand_int_movcc (operands) if ((code == LEU || code == GTU) && GET_CODE (ix86_compare_op1) == CONST_INT && mode != HImode - && (unsigned int) INTVAL (ix86_compare_op1) != 0xffffffff - /* The operand still must be representable as sign extended value. */ + && INTVAL (ix86_compare_op1) != -1 + /* For x86-64, the immediate field in the instruction is 32-bit + signed, so we can't increment a DImode value above 0x7fffffff. */ && (!TARGET_64BIT || GET_MODE (ix86_compare_op0) != DImode - || (unsigned int) INTVAL (ix86_compare_op1) != 0x7fffffff) + || INTVAL (ix86_compare_op1) != 0x7fffffff) && GET_CODE (operands[2]) == CONST_INT && GET_CODE (operands[3]) == CONST_INT) { @@ -8689,9 +8690,8 @@ ix86_expand_int_movcc (operands) code = LTU; else code = GEU; - ix86_compare_op1 - = gen_int_mode (INTVAL (ix86_compare_op1) + 1, - GET_MODE (ix86_compare_op0)); + ix86_compare_op1 = gen_int_mode (INTVAL (ix86_compare_op1) + 1, + GET_MODE (ix86_compare_op0)); } start_sequence (); diff --git a/gcc/testsuite/gcc.c-torture/compile/20020530-1.c b/gcc/testsuite/gcc.c-torture/compile/20020530-1.c new file mode 100644 index 0000000..a679489 --- /dev/null +++ b/gcc/testsuite/gcc.c-torture/compile/20020530-1.c @@ -0,0 +1,16 @@ +/* PR optimization/6822 */ + +extern unsigned char foo1 (void); +extern unsigned short foo2 (void); + +int bar1 (void) +{ + unsigned char q = foo1 (); + return (q < 0x80) ? 64 : 0; +} + +int bar2 (void) +{ + unsigned short h = foo2 (); + return (h < 0x8000) ? 64 : 0; +} |