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| author | Nick Clifton <nickc@gcc.gnu.org> | 2000-03-17 18:15:53 +0000 |
|---|---|---|
| committer | Nick Clifton <nickc@gcc.gnu.org> | 2000-03-17 18:15:53 +0000 |
| commit | 24994dd5d7ab1a37ef477afb97b4426a7ac4bcc8 (patch) | |
| tree | 8896ab1cf3b0161d8bcb31173f47eac57af35040 /gcc | |
| parent | 665f250366b2cd1528c32b0d7d2fea6aae006e85 (diff) | |
| download | gcc-24994dd5d7ab1a37ef477afb97b4426a7ac4bcc8.zip gcc-24994dd5d7ab1a37ef477afb97b4426a7ac4bcc8.tar.gz gcc-24994dd5d7ab1a37ef477afb97b4426a7ac4bcc8.tar.bz2 | |
Revert unapproved changes that were inadvertanly brought in with the previous
delta.
From-SVN: r32608
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/config/arm/arm.h | 37 |
1 files changed, 0 insertions, 37 deletions
diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h index bc02db7..23b5d88 100644 --- a/gcc/config/arm/arm.h +++ b/gcc/config/arm/arm.h @@ -250,22 +250,6 @@ Unrecognized value in TARGET_CPU_DEFAULT. #define SUBTARGET_CPP_SPEC "" #endif -#ifndef SUBTARGET_EXTRA_ASM_SPEC -#define SUBTARGET_EXTRA_ASM_SPEC -#endif - -#ifndef ASM_SPEC -#define ASM_SPEC "\ -%{mbig-endian:-EB} \ -%{mcpu=*:-m%*} \ -%{march=*:-m%*} \ -%{mapcs-*:-mapcs-%*} \ -%{matpcs:-matpcs} \ -%{mapcs-float:-mfloat} \ -%{msoft-float:-mno-fpu} \ -%{mthumb-interwork:-mthumb-interwork} \ -" SUBTARGET_EXTRA_ASM_SPEC -#endif /* Run-time Target Specification. */ #ifndef TARGET_VERSION @@ -337,15 +321,6 @@ Unrecognized value in TARGET_CPU_DEFAULT. /* Nonzero if all call instructions should be indirect. */ #define ARM_FLAG_LONG_CALLS (1 << 15) -/* Set if ATPCS compliance is required. Note there *are* some - incompatabilities between APCS and ATPCS. */ -#define ARM_FLAG_ATPCS (1 << 16) - -/* Set if compatability with older versions of GCC is required, - where struct { float a; } would be returned from a function - by a hidden extra argument rather than in r0. */ -#define ARM_FLAG_BUGGY_RETURN_IN_MEMORY (1 << 17) - #define TARGET_APCS (target_flags & ARM_FLAG_APCS_FRAME) #define TARGET_POKE_FUNCTION_NAME (target_flags & ARM_FLAG_POKE) #define TARGET_FPE (target_flags & ARM_FLAG_FPE) @@ -363,8 +338,6 @@ Unrecognized value in TARGET_CPU_DEFAULT. #define TARGET_ABORT_NORETURN (target_flags & ARM_FLAG_ABORT_NORETURN) #define TARGET_SINGLE_PIC_BASE (target_flags & ARM_FLAG_SINGLE_PIC_BASE) #define TARGET_LONG_CALLS (target_flags & ARM_FLAG_LONG_CALLS) -#define TARGET_ATPCS (target_flags & ARM_FLAG_ATPCS) -#define TARGET_BUGGY_RETURN_IN_MEMORY (target_flags & ARM_FLAG_BUGGY_RETURN_IN_MEMORY) /* SUBTARGET_SWITCHES is used to add flags on a per-config basis. Bit 31 is reserved. See riscix.h. */ @@ -426,12 +399,6 @@ Unrecognized value in TARGET_CPU_DEFAULT. {"long-calls", ARM_FLAG_LONG_CALLS, \ "Generate call insns as indirect calls, if necessary"}, \ {"no-long-calls", -ARM_FLAG_LONG_CALLS, ""}, \ - {"atpcs", ARM_FLAG_ATPCS, \ - "generate ATPCS compliant code, rather than APCS compliant code" }, \ - {"no-atpcs", -ARM_FLAG_ATPCS, "" }, \ - {"buggy-return-in-memory", ARM_FLAG_BUGGY_RETURN_IN_MEMORY,\ - "return struct { float a; } in memory" }, \ - {"no-buggy-return-in-memory",-ARM_FLAG_BUGGY_RETURN_IN_MEMORY, "" }, \ SUBTARGET_SWITCHES \ {"", TARGET_DEFAULT, "" } \ } @@ -2011,10 +1978,6 @@ extern int making_const_table; /* Handle pragmas for compatibility with Intel's compilers. */ #define HANDLE_PRAGMA(GET, UNGET, NAME) arm_process_pragma (GET, UNGET, NAME) - -/* Allow short-call attribute functions to be inlined. */ -#define FUNCTION_ATTRIBUTE_INLINABLE_P(fndecl) \ - arm_function_attribute_inlineable_p (fndecl); /* Condition code information. */ /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE, |