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authorDoug Evans <dje@gnu.org>1996-09-13 22:23:04 +0000
committerDoug Evans <dje@gnu.org>1996-09-13 22:23:04 +0000
commit22371ff356e90dd06b1bdbe097e246e3b63d7426 (patch)
tree0937a72d039d76f0c45ae530a7cf0985ff3b3978 /gcc
parenta526200977c3bd00a8935f2336644a6728ddd958 (diff)
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lb1spc.asm (.div): Fixed typo so sign is returned correctly.
* sparc/lb1spc.asm (.div): Fixed typo so sign is returned correctly. TOPBITS was 2 and should have been 4. (.rem): Likewise. From-SVN: r12707
Diffstat (limited to 'gcc')
-rw-r--r--gcc/config/sparc/lb1spc.asm20
1 files changed, 10 insertions, 10 deletions
diff --git a/gcc/config/sparc/lb1spc.asm b/gcc/config/sparc/lb1spc.asm
index c74ef6a..ec9532d 100644
--- a/gcc/config/sparc/lb1spc.asm
+++ b/gcc/config/sparc/lb1spc.asm
@@ -87,14 +87,14 @@ mul_shortway:
.udiv:
save %sp, -64, %sp
b divide
- mov 0, %i2 ! result always positive
+ mov 0, %l2 ! result always positive
.global .div
.proc 4
.div:
save %sp, -64, %sp
orcc %i1, %i0, %g0 ! is either operand negative
bge divide ! if not, skip this junk
- xor %i1, %i0, %i2 ! record sign of result in sign of %i2
+ xor %i1, %i0, %l2 ! record sign of result in sign of %l2
tst %i1
bge 2f
tst %i0
@@ -110,7 +110,7 @@ divide:
te 2 ! if %i1 = 0
mov %i0, %i3
mov 0, %i2
- sethi %hi(1<<(32-2-1)), %l3
+ sethi %hi(1<<(32-4-1)), %l3
cmp %i3, %l3
blu not_really_big
mov 0, %l0
@@ -137,7 +137,7 @@ divide:
! We are here if the %i1 overflowed when Shifting.
! This means that %i3 has the high-order bit set.
! Restore %l1 and subtract from %i3.
- sll %l3, 2, %l3
+ sll %l3, 4, %l3
srl %l1, 1, %l1
add %l1, %l3, %l1
b do_single_div
@@ -271,7 +271,7 @@ end_regular_divide:
! non-restoring fixup here
dec %i2
got_result:
- tst %i2
+ tst %l2
bge 1f
restore
! answer < 0
@@ -289,14 +289,14 @@ got_result:
.urem:
save %sp, -64, %sp
b divide
- mov 0, %i2 ! result always positive
+ mov 0, %l2 ! result always positive
.global .rem
.proc 4
.rem:
save %sp, -64, %sp
orcc %i1, %i0, %g0 ! is either operand negative
bge divide ! if not, skip this junk
- mov %i0, %i2 ! record sign of result in sign of %i2
+ mov %i0, %l2 ! record sign of result in sign of %i2
tst %i1
bge 2f
tst %i0
@@ -312,7 +312,7 @@ divide:
te 2 ! if %i1 = 0
mov %i0, %i3
mov 0, %i2
- sethi %hi(1<<(32-2-1)), %l3
+ sethi %hi(1<<(32-4-1)), %l3
cmp %i3, %l3
blu not_really_big
mov 0, %l0
@@ -339,7 +339,7 @@ divide:
! We are here if the %i1 overflowed when Shifting.
! This means that %i3 has the high-order bit set.
! Restore %l1 and subtract from %i3.
- sll %l3, 2, %l3
+ sll %l3, 4, %l3
srl %l1, 1, %l1
add %l1, %l3, %l1
b do_single_div
@@ -473,7 +473,7 @@ end_regular_divide:
! non-restoring fixup here
add %i3, %i1, %i3
got_result:
- tst %i2
+ tst %l2
bge 1f
restore
! answer < 0