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authorH.J. Lu <hjl.tools@gmail.com>2020-02-13 05:28:38 -0800
committerH.J. Lu <hjl.tools@gmail.com>2020-02-13 05:29:14 -0800
commit1d69147af203d4dcd2270429f90c93f1a37ddfff (patch)
treeb5150434ab7d6b5e994e9dab320d07c101a58863 /gcc
parentac5e8d2fa0c3a44a0576e11b758fbecc9a1a2f99 (diff)
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i386: Skip ENDBR32 at the target function entry
Skip ENDBR32 at the target function entry when initializing trampoline. Tested on Linux/x86-64 CET machine with and without -m32. gcc/ PR target/93656 * config/i386/i386.c (ix86_trampoline_init): Skip ENDBR32 at the target function entry. gcc/testsuite/ PR target/93656 * gcc.target/i386/pr93656.c: New test.
Diffstat (limited to 'gcc')
-rw-r--r--gcc/ChangeLog6
-rw-r--r--gcc/config/i386/i386.c7
-rw-r--r--gcc/testsuite/ChangeLog5
-rw-r--r--gcc/testsuite/gcc.target/i386/pr93656.c4
4 files changed, 21 insertions, 1 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 4149839..d9fb2c8 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2020-02-13 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR target/93656
+ * config/i386/i386.c (ix86_trampoline_init): Skip ENDBR32 at
+ the target function entry.
+
2020-02-13 Claudiu Zissulescu <claziss@synopsys.com>
* common/config/arc/arc-common.c (arc_option_optimization_table):
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index 44bc0e0..dac7a3f 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -16839,9 +16839,14 @@ ix86_trampoline_init (rtx m_tramp, tree fndecl, rtx chain_value)
the stack, we need to skip the first insn which pushes the
(call-saved) register static chain; this push is 1 byte. */
offset += 5;
+ int skip = MEM_P (chain) ? 1 : 0;
+ /* Skip ENDBR32 at the entry of the target function. */
+ if (need_endbr
+ && !cgraph_node::get (fndecl)->only_called_directly_p ())
+ skip += 4;
disp = expand_binop (SImode, sub_optab, fnaddr,
plus_constant (Pmode, XEXP (m_tramp, 0),
- offset - (MEM_P (chain) ? 1 : 0)),
+ offset - skip),
NULL_RTX, 1, OPTAB_DIRECT);
emit_move_insn (mem, disp);
}
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 5ac858e..c296fc3 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2020-02-13 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR target/93656
+ * gcc.target/i386/pr93656.c: New test.
+
2020-02-13 Claudiu Zissulescu <claziss@synopsys.com>
* gcc.target/arc/nps400-1.c: Update test.
diff --git a/gcc/testsuite/gcc.target/i386/pr93656.c b/gcc/testsuite/gcc.target/i386/pr93656.c
new file mode 100644
index 0000000..f0ac8c8
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr93656.c
@@ -0,0 +1,4 @@
+/* { dg-do run { target { ia32 && cet } } } */
+/* { dg-options "-O2 -fcf-protection" } */
+
+#include "pr67770.c"