ifcvt-1.c: Compile also for 64-bit i?86-*-* target.

	* gcc.dg/ifcvt-1.c: Compile also for 64-bit i?86-*-* target.
	* gcc.dg/ifcvt-2.c: Ditto.
	* gcc.dg/zero_bits_compound-1.c: Ditto.
	* gcc.dg/zero_bits_compound-1.c: Ditto.
	* gcc.dg/pr40550.c: Simplify target selectors.
	Use dg-additional-options.
	* gcc.dg/pr47893.c: Ditto.
	* gcc.dg/pr68435.c: Compile also for i?86-*-* target.  Add -march=i686
	additional options for 32-bit x86 targets.
	* gcc.dg/pr70955.c: Move to ...
	* gcc.target/i386/pr70955.c: ... here.  Simplify target selector.

From-SVN: r240381

9 files changed, 26 insertions, 11 deletions

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index da6be3c..fff439a 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,17 @@
+2016-09-22  Uros Bizjak  <ubizjak@gmail.com>
+
+	* gcc.dg/ifcvt-1.c: Compile also for 64-bit i?86-*-* target.
+	* gcc.dg/ifcvt-2.c: Ditto.
+	* gcc.dg/zero_bits_compound-1.c: Ditto.
+	* gcc.dg/zero_bits_compound-1.c: Ditto.
+	* gcc.dg/pr40550.c: Simplify target selectors.
+	Use dg-additional-options.
+	* gcc.dg/pr47893.c: Ditto.
+	* gcc.dg/pr68435.c: Compile also for i?86-*-* target.  Add -march=i686
+	additional options for 32-bit x86 targets.
+	* gcc.dg/pr70955.c: Move to ...
+	* gcc.target/i386/pr70955.c: ... here.  Simplify target selector.
+
 2016-09-22  Paolo Carlini  <paolo.carlini@oracle.com>
 
 	PR c++/61019
diff --git a/gcc/testsuite/gcc.dg/ifcvt-1.c b/gcc/testsuite/gcc.dg/ifcvt-1.c
index 92bc17a..02bd628 100644
--- a/gcc/testsuite/gcc.dg/ifcvt-1.c
+++ b/gcc/testsuite/gcc.dg/ifcvt-1.c
@@ -1,4 +1,4 @@
-/* { dg-do compile { target aarch64*-*-* x86_64-*-* } } */
+/* { dg-do compile { target { { { i?86-*-* x86_64-*-* } && { ! ia32 } } || aarch64*-*-* } } } */
 /* { dg-options "-fdump-rtl-ce1 -O2" } */
 
 int
diff --git a/gcc/testsuite/gcc.dg/ifcvt-2.c b/gcc/testsuite/gcc.dg/ifcvt-2.c
index 73e0dcc..cdd525e 100644
--- a/gcc/testsuite/gcc.dg/ifcvt-2.c
+++ b/gcc/testsuite/gcc.dg/ifcvt-2.c
@@ -1,7 +1,6 @@
-/* { dg-do compile { target aarch64*-*-* x86_64-*-* } } */
+/* { dg-do compile { target { { { i?86-*-* x86_64-*-* } && { ! ia32 } } || aarch64*-*-* } } } */
 /* { dg-options "-fdump-rtl-ce1 -O2 --param max-rtl-if-conversion-unpredictable-cost=100" } */
 
-
 typedef unsigned char uint8_t;
 typedef unsigned int uint16_t;
 
diff --git a/gcc/testsuite/gcc.dg/pr40550.c b/gcc/testsuite/gcc.dg/pr40550.c
index 0895113..0de5554 100644
--- a/gcc/testsuite/gcc.dg/pr40550.c
+++ b/gcc/testsuite/gcc.dg/pr40550.c
@@ -1,6 +1,7 @@
 /* { dg-do run } */
-/* { dg-options "-msse" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
-/* { dg-require-effective-target sse_runtime { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
+/* { dg-options "" } */
+/* { dg-additional-options "-msse" { target i?86-*-* x86_64-*-* } } */
+/* { dg-require-effective-target sse_runtime { target { i?86-*-* x86_64-*-* } } } */
 
 typedef float v2sf __attribute__ ((vector_size (2 * sizeof(float))));
 
diff --git a/gcc/testsuite/gcc.dg/pr47893.c b/gcc/testsuite/gcc.dg/pr47893.c
index 86eb78d..868ae3e 100644
--- a/gcc/testsuite/gcc.dg/pr47893.c
+++ b/gcc/testsuite/gcc.dg/pr47893.c
@@ -1,7 +1,7 @@
 /* PR middle-end/47893 */
 /* { dg-do run } */
 /* { dg-options "-O2" } */
-/* { dg-options "-O2 -mtune=atom -fno-omit-frame-pointer -fno-strict-aliasing" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
+/* { dg-additional-options "-mtune=atom -fno-omit-frame-pointer -fno-strict-aliasing" { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
 /* { dg-skip-if "Too much RAM needed" { "avr-*-*" } { "*" } { "" } } */
 
 extern void abort (void);
diff --git a/gcc/testsuite/gcc.dg/pr68435.c b/gcc/testsuite/gcc.dg/pr68435.c
index f86b7f8..2c7c8b8 100644
--- a/gcc/testsuite/gcc.dg/pr68435.c
+++ b/gcc/testsuite/gcc.dg/pr68435.c
@@ -1,5 +1,6 @@
-/* { dg-do compile { target aarch64*-*-* x86_64-*-* } } */
+/* { dg-do compile { target aarch64*-*-* i?86-*-* x86_64-*-* } } */
 /* { dg-options "-fdump-rtl-ce1 -O2 -w --param max-rtl-if-conversion-unpredictable-cost=100" } */
+/* { dg-additional-options "-march=i686" { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
 
 typedef struct cpp_reader cpp_reader;
 enum cpp_ttype
diff --git a/gcc/testsuite/gcc.dg/zero_bits_compound-1.c b/gcc/testsuite/gcc.dg/zero_bits_compound-1.c
index 650da60..63b8ac1 100644
--- a/gcc/testsuite/gcc.dg/zero_bits_compound-1.c
+++ b/gcc/testsuite/gcc.dg/zero_bits_compound-1.c
@@ -4,7 +4,7 @@
 /* Note: This test requires that char, int and long have different sizes and the
    target has a way to do 32 -> 64 bit zero extension other than AND.  */
 
-/* { dg-do compile { target x86_64-*-* s390*-*-* aarch64*-*-* } } */
+/* { dg-do compile { target i?86-*-* x86_64-*-* s390*-*-* aarch64*-*-* } } */
 /* { dg-require-effective-target lp64 } */
 /* { dg-options "-O3 -dP" } */
 
diff --git a/gcc/testsuite/gcc.dg/zero_bits_compound-2.c b/gcc/testsuite/gcc.dg/zero_bits_compound-2.c
index f282b94..f6c390a 100644
--- a/gcc/testsuite/gcc.dg/zero_bits_compound-2.c
+++ b/gcc/testsuite/gcc.dg/zero_bits_compound-2.c
@@ -1,7 +1,7 @@
 /* Test whether an AND mask or'ed with the know zero bits that equals a mode
    mask is a candidate for zero extendion.  */
 
-/* { dg-do compile { target x86_64-*-* s390*-*-* aarch64*-*-* } } */
+/* { dg-do compile { target i?86-*-* x86_64-*-* s390*-*-* aarch64*-*-* } } */
 /* { dg-require-effective-target lp64 } */
 /* { dg-options "-O3 -dP" } */
 
diff --git a/gcc/testsuite/gcc.dg/pr70955.c b/gcc/testsuite/gcc.target/i386/pr70955.c
index 1275a5f..fb5c3c3 100644
--- a/gcc/testsuite/gcc.dg/pr70955.c
+++ b/gcc/testsuite/gcc.target/i386/pr70955.c
@@ -1,5 +1,5 @@
-/* __builtin_ms_va_list is only supported for x86_64 -m64.  */
-/* { dg-do run { target { x86_64-*-* && { ! ilp32 } } } } */
+/* __builtin_ms_va_list is only supported for -m64.  */
+/* { dg-do run { target lp64 } } */
 /* { dg-require-effective-target lto } */
 /* { dg-options "-flto" } */