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author | Richard Kenner <kenner@gcc.gnu.org> | 1994-04-11 18:20:53 -0400 |
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committer | Richard Kenner <kenner@gcc.gnu.org> | 1994-04-11 18:20:53 -0400 |
commit | 1c2bdc600335e005b891b65c98e9c3087fd9c9c4 (patch) | |
tree | cf03d7624d344cc3f787a32651dda9161bd14cf8 /gcc | |
parent | a6e8021ecfebab427133d1f94d79561eb188652a (diff) | |
download | gcc-1c2bdc600335e005b891b65c98e9c3087fd9c9c4.zip gcc-1c2bdc600335e005b891b65c98e9c3087fd9c9c4.tar.gz gcc-1c2bdc600335e005b891b65c98e9c3087fd9c9c4.tar.bz2 |
(compare define_split): Fix bugs in last addition.
From-SVN: r7037
Diffstat (limited to 'gcc')
-rw-r--r-- | gcc/config/alpha/alpha.md | 17 |
1 files changed, 9 insertions, 8 deletions
diff --git a/gcc/config/alpha/alpha.md b/gcc/config/alpha/alpha.md index 7f2999f..f42cda6 100644 --- a/gcc/config/alpha/alpha.md +++ b/gcc/config/alpha/alpha.md @@ -1,6 +1,6 @@ -;;- Machine description for DEC Alpha for GNU C compiler -;; Copyright (C) 1992, 1993, 1994 Free Software Foundation, Inc. -;; Contributed by Richard Kenner (kenner@nyu.edu) +;; Machine description for DEC Alpha for GNU C compiler +;; Copyright (C) 1992, 1993, 1994 Free Software Foundation, Inc. +;; Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu) ;; This file is part of GNU CC. @@ -2233,7 +2233,7 @@ operands[4], const0_rtx); }") -;; We can convert such things as "a > 0xffff" to "t = a & 0xffff; t != 0". +;; We can convert such things as "a > 0xffff" to "t = a & ~ 0xffff; t != 0". ;; This eliminates one, and sometimes two, insns when the AND can be done ;; with a ZAP. (define_split @@ -2247,13 +2247,14 @@ || GET_CODE (operands[1]) == LEU || ((GET_CODE (operands[1]) == GT || GET_CODE (operands[1]) == LE) && extended_count (operands[2], DImode, 1) > 0))" - [(set (match_dup 4) (and:DI (match_dup 2) (match_dup 3))) - (set (match_dup 0) (match_dup 5))] + [(set (match_dup 4) (and:DI (match_dup 2) (match_dup 5))) + (set (match_dup 0) (match_dup 6))] " { - operands[5] = gen_rtx (((GET_CODE (operands[1]) == GTU + operands[5] = GEN_INT (~ INTVAL (operands[3])); + operands[6] = gen_rtx (((GET_CODE (operands[1]) == GTU || GET_CODE (operands[1]) == GE) - ? NE : LE), + ? NE : EQ), DImode, operands[4], const0_rtx); }") |