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| author | Kyrylo Tkachov <kyrylo.tkachov@arm.com> | 2013-06-05 17:02:31 +0000 |
|---|---|---|
| committer | Kyrylo Tkachov <ktkachov@gcc.gnu.org> | 2013-06-05 17:02:31 +0000 |
| commit | 17a7fc37d4cc1d5c6d51c9c59de0b193e9462b48 (patch) | |
| tree | 796ab7ff5369ba9e666141c27d643881770ddfb4 /gcc | |
| parent | 5124937746e3ff9ff7c32963b359c4d903f35290 (diff) | |
| download | gcc-17a7fc37d4cc1d5c6d51c9c59de0b193e9462b48.zip gcc-17a7fc37d4cc1d5c6d51c9c59de0b193e9462b48.tar.gz gcc-17a7fc37d4cc1d5c6d51c9c59de0b193e9462b48.tar.bz2 | |
arm.md (enabled_for_depr_it): New attribute.
2013-06-05 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* config/arm/arm.md (enabled_for_depr_it): New attribute.
(predicable_short_it): Likewise.
(predicated): Likewise.
(enabled): Handle above.
(define_cond_exec): Set predicated attribute to yes.
From-SVN: r199705
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 8 | ||||
| -rw-r--r-- | gcc/config/arm/arm.md | 21 |
2 files changed, 29 insertions, 0 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index bc7f98e..7932819 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,11 @@ +2013-06-05 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/arm/arm.md (enabled_for_depr_it): New attribute. + (predicable_short_it): Likewise. + (predicated): Likewise. + (enabled): Handle above. + (define_cond_exec): Set predicated attribute to yes. + 2013-06-05 Mike Stump <mikestump@comcast.net> * gdbinit.in (__FUNCTION__): Add. diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md index 466baa8..5370efa 100644 --- a/gcc/config/arm/arm.md +++ b/gcc/config/arm/arm.md @@ -93,6 +93,15 @@ ; IS_THUMB1 is set to 'yes' iff we are generating Thumb-1 code. (define_attr "is_thumb1" "no,yes" (const (symbol_ref "thumb1_code"))) +; We use this attribute to disable alternatives that can produce 32-bit +; instructions inside an IT-block in Thumb2 state. ARMv8 deprecates IT blocks +; that contain 32-bit instructions. +(define_attr "enabled_for_depr_it" "no,yes" (const_string "yes")) + +; This attribute is used to disable a predicated alternative when we have +; arm_restrict_it. +(define_attr "predicable_short_it" "no,yes" (const_string "yes")) + ;; Operand number of an input operand that is shifted. Zero if the ;; given instruction does not shift one of its input operands. (define_attr "shift" "" (const_int 0)) @@ -103,6 +112,8 @@ (define_attr "fpu" "none,vfp" (const (symbol_ref "arm_fpu_attr"))) +(define_attr "predicated" "yes,no" (const_string "no")) + ; LENGTH of an instruction (in bytes) (define_attr "length" "" (const_int 4)) @@ -190,6 +201,15 @@ (cond [(eq_attr "insn_enabled" "no") (const_string "no") + (and (eq_attr "predicable_short_it" "no") + (and (eq_attr "predicated" "yes") + (match_test "arm_restrict_it"))) + (const_string "no") + + (and (eq_attr "enabled_for_depr_it" "no") + (match_test "arm_restrict_it")) + (const_string "no") + (eq_attr "arch_enabled" "no") (const_string "no") @@ -12130,6 +12150,7 @@ (const_int 0)])] "TARGET_32BIT" "" +[(set_attr "predicated" "yes")] ) (define_insn "force_register_use" |