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| author | Alan Modra <amodra@gmail.com> | 2020-10-27 11:16:48 +1030 |
|---|---|---|
| committer | Alan Modra <amodra@gmail.com> | 2020-10-27 11:25:30 +1030 |
| commit | 15c908807e8865e5bda12942a68bc919a4a2957d (patch) | |
| tree | 1d14bc0bf4ff2d7fa36e88dce92075dece54edaa /gcc | |
| parent | f19e7c8d5b0d69511a67b718ba31df87f5be0e9f (diff) | |
| download | gcc-15c908807e8865e5bda12942a68bc919a4a2957d.zip gcc-15c908807e8865e5bda12942a68bc919a4a2957d.tar.gz gcc-15c908807e8865e5bda12942a68bc919a4a2957d.tar.bz2 | |
[RS6000] Separate dg-require-effective-target options
* gcc.target/powerpc/vsx_mask-count-runnable.c: Separate options
passed to dg-require-effective-target.
* gcc.target/powerpc/vsx_mask-expand-runnable.c: Likewise.
* gcc.target/powerpc/vsx_mask-extract-runnable.c: Likewise.
* gcc.target/powerpc/vsx_mask-move-runnable.c: Likewise.
Diffstat (limited to 'gcc')
4 files changed, 8 insertions, 4 deletions
diff --git a/gcc/testsuite/gcc.target/powerpc/vsx_mask-count-runnable.c b/gcc/testsuite/gcc.target/powerpc/vsx_mask-count-runnable.c index 6aa165c..28aa7da 100644 --- a/gcc/testsuite/gcc.target/powerpc/vsx_mask-count-runnable.c +++ b/gcc/testsuite/gcc.target/powerpc/vsx_mask-count-runnable.c @@ -1,7 +1,8 @@ /* { dg-do run { target { power10_hw } } } */ /* { dg-do link { target { ! power10_hw } } } */ /* { dg-options "-mdejagnu-cpu=power10 -O2" } */ -/* { dg-require-effective-target { int128 && power10_ok } } */ +/* { dg-require-effective-target power10_ok } */ +/* { dg-require-effective-target int128 } */ /* Check that the expected 128-bit instructions are generated if the processor supports the 128-bit integer instructions. */ diff --git a/gcc/testsuite/gcc.target/powerpc/vsx_mask-expand-runnable.c b/gcc/testsuite/gcc.target/powerpc/vsx_mask-expand-runnable.c index 9fdfa4a..68c1c3f 100644 --- a/gcc/testsuite/gcc.target/powerpc/vsx_mask-expand-runnable.c +++ b/gcc/testsuite/gcc.target/powerpc/vsx_mask-expand-runnable.c @@ -1,7 +1,8 @@ /* { dg-do run { target { power10_hw } } } */ /* { dg-do link { target { ! power10_hw } } } */ /* { dg-options "-mdejagnu-cpu=power10 -O2" } */ -/* { dg-require-effective-target { int128 && power10_ok } } */ +/* { dg-require-effective-target power10_ok } */ +/* { dg-require-effective-target int128 } */ /* Check that the expected 128-bit instructions are generated if the processor supports the 128-bit integer instructions. */ diff --git a/gcc/testsuite/gcc.target/powerpc/vsx_mask-extract-runnable.c b/gcc/testsuite/gcc.target/powerpc/vsx_mask-extract-runnable.c index a038e56..4664807 100644 --- a/gcc/testsuite/gcc.target/powerpc/vsx_mask-extract-runnable.c +++ b/gcc/testsuite/gcc.target/powerpc/vsx_mask-extract-runnable.c @@ -1,7 +1,8 @@ /* { dg-do run { target { power10_hw } } } */ /* { dg-do link { target { ! power10_hw } } } */ /* { dg-options "-mdejagnu-cpu=power10 -O2" } */ -/* { dg-require-effective-target { int128 && power10_ok } } */ +/* { dg-require-effective-target power10_ok } */ +/* { dg-require-effective-target int128 } */ /* Check that the expected 128-bit instructions are generated if the processor supports the 128-bit integer instructions. */ diff --git a/gcc/testsuite/gcc.target/powerpc/vsx_mask-move-runnable.c b/gcc/testsuite/gcc.target/powerpc/vsx_mask-move-runnable.c index 6f87e60..58954dc 100644 --- a/gcc/testsuite/gcc.target/powerpc/vsx_mask-move-runnable.c +++ b/gcc/testsuite/gcc.target/powerpc/vsx_mask-move-runnable.c @@ -1,7 +1,8 @@ /* { dg-do run { target { power10_hw } } } */ /* { dg-do link { target { ! power10_hw } } } */ /* { dg-options "-mdejagnu-cpu=power10 -O2" } */ -/* { dg-require-effective-target { int128 && power10_ok } } */ +/* { dg-require-effective-target power10_ok } */ +/* { dg-require-effective-target int128 } */ /* Check that the expected 128-bit instructions are generated if the processor supports the 128-bit integer instructions. */ |