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| author | Wei Mi <wmi@google.com> | 2013-04-01 17:27:46 +0000 |
|---|---|---|
| committer | Wei Mi <wmi@gcc.gnu.org> | 2013-04-01 17:27:46 +0000 |
| commit | 136fb3f734a18e6759988346b1c8d3e34e67d05a (patch) | |
| tree | d2ad988cd54d87e96b083e4fa5433603ce60504c /gcc | |
| parent | 6388c7382f78443f1284e2174a6834688b4e86a5 (diff) | |
| download | gcc-136fb3f734a18e6759988346b1c8d3e34e67d05a.zip gcc-136fb3f734a18e6759988346b1c8d3e34e67d05a.tar.gz gcc-136fb3f734a18e6759988346b1c8d3e34e67d05a.tar.bz2 | |
i386.md (*ashl<mode>3_mask): Rewrite as define_insn.
2013-04-01 Wei Mi <wmi@google.com>
* config/i386/i386.md (*ashl<mode>3_mask): Rewrite as define_insn.
Truncate operand 2 using %b asm operand modifier.
(*<shift_insn><mode>3_mask): Ditto.
(*<rotate_insn><mode>3_mask): Ditto.
From-SVN: r197308
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 7 | ||||
| -rw-r--r-- | gcc/config/i386/i386.md | 42 |
2 files changed, 16 insertions, 33 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 48977bf..7c7db0c 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2013-04-01 Wei Mi <wmi@google.com> + + * config/i386/i386.md (*ashl<mode>3_mask): Rewrite as define_insn. + Truncate operand 2 using %b asm operand modifier. + (*<shift_insn><mode>3_mask): Ditto. + (*<rotate_insn><mode>3_mask): Ditto. + 2013-04-01 Steven Bosscher <steven@gcc.gnu.org> PR middle-end/56798 diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index bf0020c..5b794a1 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -8647,28 +8647,20 @@ }) ;; Avoid useless masking of count operand. -(define_insn_and_split "*ashl<mode>3_mask" +(define_insn "*ashl<mode>3_mask" [(set (match_operand:SWI48 0 "nonimmediate_operand" "=rm") (ashift:SWI48 (match_operand:SWI48 1 "nonimmediate_operand" "0") (subreg:QI (and:SI - (match_operand:SI 2 "nonimmediate_operand" "c") + (match_operand:SI 2 "register_operand" "c") (match_operand:SI 3 "const_int_operand" "n")) 0))) (clobber (reg:CC FLAGS_REG))] "ix86_binary_operator_ok (ASHIFT, <MODE>mode, operands) && (INTVAL (operands[3]) & (GET_MODE_BITSIZE (<MODE>mode)-1)) == GET_MODE_BITSIZE (<MODE>mode)-1" - "#" - "&& 1" - [(parallel [(set (match_dup 0) - (ashift:SWI48 (match_dup 1) (match_dup 2))) - (clobber (reg:CC FLAGS_REG))])] { - if (can_create_pseudo_p ()) - operands [2] = force_reg (SImode, operands[2]); - - operands[2] = simplify_gen_subreg (QImode, operands[2], SImode, 0); + return "sal{<imodesuffix>}\t{%b2, %0|%0, %b2}"; } [(set_attr "type" "ishift") (set_attr "mode" "<MODE>")]) @@ -9157,28 +9149,20 @@ "ix86_expand_binary_operator (<CODE>, <MODE>mode, operands); DONE;") ;; Avoid useless masking of count operand. -(define_insn_and_split "*<shift_insn><mode>3_mask" +(define_insn "*<shift_insn><mode>3_mask" [(set (match_operand:SWI48 0 "nonimmediate_operand" "=rm") (any_shiftrt:SWI48 (match_operand:SWI48 1 "nonimmediate_operand" "0") (subreg:QI (and:SI - (match_operand:SI 2 "nonimmediate_operand" "c") + (match_operand:SI 2 "register_operand" "c") (match_operand:SI 3 "const_int_operand" "n")) 0))) (clobber (reg:CC FLAGS_REG))] "ix86_binary_operator_ok (<CODE>, <MODE>mode, operands) && (INTVAL (operands[3]) & (GET_MODE_BITSIZE (<MODE>mode)-1)) == GET_MODE_BITSIZE (<MODE>mode)-1" - "#" - "&& 1" - [(parallel [(set (match_dup 0) - (any_shiftrt:SWI48 (match_dup 1) (match_dup 2))) - (clobber (reg:CC FLAGS_REG))])] { - if (can_create_pseudo_p ()) - operands [2] = force_reg (SImode, operands[2]); - - operands[2] = simplify_gen_subreg (QImode, operands[2], SImode, 0); + return "<shift>{<imodesuffix>}\t{%b2, %0|%0, %b2}"; } [(set_attr "type" "ishift") (set_attr "mode" "<MODE>")]) @@ -9620,28 +9604,20 @@ "ix86_expand_binary_operator (<CODE>, <MODE>mode, operands); DONE;") ;; Avoid useless masking of count operand. -(define_insn_and_split "*<rotate_insn><mode>3_mask" +(define_insn "*<rotate_insn><mode>3_mask" [(set (match_operand:SWI48 0 "nonimmediate_operand" "=rm") (any_rotate:SWI48 (match_operand:SWI48 1 "nonimmediate_operand" "0") (subreg:QI (and:SI - (match_operand:SI 2 "nonimmediate_operand" "c") + (match_operand:SI 2 "register_operand" "c") (match_operand:SI 3 "const_int_operand" "n")) 0))) (clobber (reg:CC FLAGS_REG))] "ix86_binary_operator_ok (<CODE>, <MODE>mode, operands) && (INTVAL (operands[3]) & (GET_MODE_BITSIZE (<MODE>mode)-1)) == GET_MODE_BITSIZE (<MODE>mode)-1" - "#" - "&& 1" - [(parallel [(set (match_dup 0) - (any_rotate:SWI48 (match_dup 1) (match_dup 2))) - (clobber (reg:CC FLAGS_REG))])] { - if (can_create_pseudo_p ()) - operands [2] = force_reg (SImode, operands[2]); - - operands[2] = simplify_gen_subreg (QImode, operands[2], SImode, 0); + return "<rotate>{<imodesuffix>}\t{%b2, %0|%0, %b2}"; } [(set_attr "type" "rotate") (set_attr "mode" "<MODE>")]) |