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authorRichard Sandiford <rsandifo@redhat.com>2003-10-06 07:53:16 +0000
committerRichard Sandiford <rsandifo@gcc.gnu.org>2003-10-06 07:53:16 +0000
commit1332e9512747ebcbc667d52dd5720fe9aaf483f7 (patch)
treeb214b332bd428895ee07df9f98403bc3a5266329 /gcc
parent96d053de318bb527a76f3ae3e632299ab7c5cc36 (diff)
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* config/mips/mips.md: Merge mips16 lw/srl pattern with its splitter
From-SVN: r72134
Diffstat (limited to 'gcc')
-rw-r--r--gcc/ChangeLog5
-rw-r--r--gcc/config/mips/mips.md29
2 files changed, 16 insertions, 18 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 6587b58..9594eb6 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,4 +1,9 @@
+2003-10-06 Richard Sandiford <rsandifo@redhat.com>
+
+ * config/mips/mips.md: Merge mips16 lw/srl pattern with its splitter.
+
2003-10-05 Andrew Pinski <apinski@apple.com>
+
* config/darwin.c (machopic_non_lazy_ptr_name): Fix off by one
errors in memcpy destinations.
(machopic_stub_name): Likewise.
diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md
index 932025f..1866439 100644
--- a/gcc/config/mips/mips.md
+++ b/gcc/config/mips/mips.md
@@ -5867,29 +5867,22 @@ sra\t%M0,%M1,%2\n\
;; register, and an and (the key problem here is that the mips16 does
;; not have and immediate). We recognize a shift of a load in order
;; to make it simple enough for combine to understand.
-
-;; ??? FIXME: turn into a define_insn_and_split
-(define_insn ""
+;;
+;; The length here is the worst case: the length of the split version
+;; will be more accurate.
+(define_insn_and_split ""
[(set (match_operand:SI 0 "register_operand" "=d")
(lshiftrt:SI (match_operand:SI 1 "memory_operand" "m")
(match_operand:SI 2 "immediate_operand" "I")))]
- "0 && TARGET_MIPS16"
- "lw\t%0,%1\;srl\t%0,%2"
- [(set_attr "type" "load")
- (set_attr "mode" "SI")
- (set_attr_alternative "length"
- [(if_then_else (match_operand:VOID 2 "m16_uimm3_b" "")
- (const_int 12)
- (const_int 16))])])
-
-(define_split
- [(set (match_operand:SI 0 "register_operand" "")
- (lshiftrt:SI (match_operand:SI 1 "memory_operand" "")
- (match_operand:SI 2 "immediate_operand" "")))]
- "TARGET_MIPS16 && !TARGET_DEBUG_D_MODE"
+ "TARGET_MIPS16"
+ "#"
+ ""
[(set (match_dup 0) (match_dup 1))
(set (match_dup 0) (lshiftrt:SI (match_dup 0) (match_dup 2)))]
- "")
+ ""
+ [(set_attr "type" "load")
+ (set_attr "mode" "SI")
+ (set_attr "length" "16")])
(define_expand "lshrdi3"
[(parallel [(set (match_operand:DI 0 "register_operand" "")