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authorVladimir Makarov <vmakarov@redhat.com>2018-12-13 20:54:27 +0000
committerVladimir Makarov <vmakarov@gcc.gnu.org>2018-12-13 20:54:27 +0000
commit11067dee85df4812303ebda57642675a0b89ef67 (patch)
tree9ad654ea7adca3344fcf62deb2226109e55539ea /gcc
parentb46e1a69975d64ad436ff1c928e008105b2b2a8d (diff)
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re PR rtl-optimization/88414 (ICE in lra_assign, at lra-assigns.c:1624)
2018-12-13 Vladimir Makarov <vmakarov@redhat.com> PR rtl-optimization/88414 * lra-int.h (lra_asm_error_p): New. * lra-assigns.c (lra_assign): Check lra_asm_error_p for checking call crossed pseudo assignment correctness. (lra_split_hard_reg_for): Set up lra_asm_error_p. * lra-constraints.c (curr_insn_transform): Ditto. * lra.c (lra_asm_error_p): New. (lra): Reset lra_asm_error_p. 2018-12-13 Vladimir Makarov <vmakarov@redhat.com> PR rtl-optimization/88414 * gcc.target/i386/pr88414.c: New. From-SVN: r267109
Diffstat (limited to 'gcc')
-rw-r--r--gcc/ChangeLog11
-rw-r--r--gcc/lra-assigns.c7
-rw-r--r--gcc/lra-constraints.c1
-rw-r--r--gcc/lra-int.h1
-rw-r--r--gcc/lra.c6
-rw-r--r--gcc/testsuite/ChangeLog5
-rw-r--r--gcc/testsuite/gcc.target/i386/pr88414.c25
7 files changed, 53 insertions, 3 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index e205c22..2029c98 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,14 @@
+2018-12-13 Vladimir Makarov <vmakarov@redhat.com>
+
+ PR rtl-optimization/88414
+ * lra-int.h (lra_asm_error_p): New.
+ * lra-assigns.c (lra_assign): Check lra_asm_error_p for checking
+ call crossed pseudo assignment correctness.
+ (lra_split_hard_reg_for): Set up lra_asm_error_p.
+ * lra-constraints.c (curr_insn_transform): Ditto.
+ * lra.c (lra_asm_error_p): New.
+ (lra): Reset lra_asm_error_p.
+
2018-12-13 Jakub Jelinek <jakub@redhat.com>
PR rtl-optimization/88416
diff --git a/gcc/lra-assigns.c b/gcc/lra-assigns.c
index c0e370b..6b9d3ae 100644
--- a/gcc/lra-assigns.c
+++ b/gcc/lra-assigns.c
@@ -1615,7 +1615,10 @@ lra_assign (bool &fails_p)
bitmap_initialize (&all_spilled_pseudos, &reg_obstack);
create_live_range_start_chains ();
setup_live_pseudos_and_spill_after_risky_transforms (&all_spilled_pseudos);
- if (flag_checking && !flag_ipa_ra)
+ if (! lra_asm_error_p && flag_checking && !flag_ipa_ra)
+ /* Check correctness of allocation for call-crossed pseudos but
+ only when there are no asm errors as in the case of errors the
+ asm is removed and it can result in incorrect allocation. */
for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++)
if (lra_reg_info[i].nrefs != 0 && reg_renumber[i] >= 0
&& lra_reg_info[i].call_p
@@ -1783,7 +1786,7 @@ lra_split_hard_reg_for (void)
insn = lra_insn_recog_data[u]->insn;
if (asm_noperands (PATTERN (insn)) >= 0)
{
- asm_p = true;
+ lra_asm_error_p = asm_p = true;
error_for_asm (insn,
"%<asm%> operand has impossible constraints");
/* Avoid further trouble with this insn.
diff --git a/gcc/lra-constraints.c b/gcc/lra-constraints.c
index ba35b95..c061093 100644
--- a/gcc/lra-constraints.c
+++ b/gcc/lra-constraints.c
@@ -3940,6 +3940,7 @@ curr_insn_transform (bool check_only_p)
fatal_insn ("unable to generate reloads for:", curr_insn);
error_for_asm (curr_insn,
"inconsistent operand constraints in an %<asm%>");
+ lra_asm_error_p = true;
/* Avoid further trouble with this insn. Don't generate use
pattern here as we could use the insn SP offset. */
lra_set_insn_deleted (curr_insn);
diff --git a/gcc/lra-int.h b/gcc/lra-int.h
index 5267b53..dc365d7 100644
--- a/gcc/lra-int.h
+++ b/gcc/lra-int.h
@@ -288,6 +288,7 @@ typedef struct lra_insn_recog_data *lra_insn_recog_data_t;
extern FILE *lra_dump_file;
+extern bool lra_asm_error_p;
extern bool lra_reg_spill_p;
extern HARD_REG_SET lra_no_alloc_regs;
diff --git a/gcc/lra.c b/gcc/lra.c
index 5d58d90..537b4ae 100644
--- a/gcc/lra.c
+++ b/gcc/lra.c
@@ -2334,6 +2334,9 @@ bitmap_head lra_subreg_reload_pseudos;
/* File used for output of LRA debug information. */
FILE *lra_dump_file;
+/* True if we found an asm error. */
+bool lra_asm_error_p;
+
/* True if we should try spill into registers of different classes
instead of memory. */
bool lra_reg_spill_p;
@@ -2371,7 +2374,8 @@ lra (FILE *f)
bool live_p, inserted_p;
lra_dump_file = f;
-
+ lra_asm_error_p = false;
+
timevar_push (TV_LRA);
/* Make sure that the last insn is a note. Some subsequent passes
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index a307687..2fe17d2 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2018-12-13 Vladimir Makarov <vmakarov@redhat.com>
+
+ PR rtl-optimization/88414
+ * gcc.target/i386/pr88414.c: New.
+
2018-12-13 Marek Polacek <polacek@redhat.com>
PR c++/88216 - ICE with class type in non-type template parameter.
diff --git a/gcc/testsuite/gcc.target/i386/pr88414.c b/gcc/testsuite/gcc.target/i386/pr88414.c
new file mode 100644
index 0000000..99a471e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr88414.c
@@ -0,0 +1,25 @@
+/* { dg-do compile } */
+/* { dg-options "-O1 -ftrapv" } */
+
+unsigned int
+foo (unsigned int *x, const unsigned int *y, int z, unsigned int w)
+{
+ unsigned int a, b, c, s;
+ int j;
+ j = -z;
+ x -= j;
+ y -= j;
+ a = 0;
+ do
+ {
+ asm volatile ("" : "=d" (b), "=d" (c) : "r" (y[j]), "d" (w)); /* { dg-error "'asm' operand has impossible constraints" } */
+ c += a;
+ a = (c < a) + b;
+ s = x[j];
+ c = s + c;
+ a += (c < s);
+ x[j] = c;
+ }
+ while (++j != 0);
+ return a;
+}